參數(shù)資料
型號(hào): SI3210PPTX-EVB
廠商: Silicon Laboratories Inc
文件頁數(shù): 16/148頁
文件大?。?/td> 0K
描述: BOARD EVALUATION FOR SI3210
標(biāo)準(zhǔn)包裝: 1
Si3210/Si3211
112
Rev. 1.61
Not
Recommended
fo
r N
ew
D
esi
gn
s
Reset settings = 0001_1111
Reset settings = 0001_0000
Register 97. Calibration Control/Status Register 2
Bit
D7D6D5D4D3D2
D1D0
Name
CALM1
CALM2
CALDAC
CALADC
CALCM
Type
R/WR/WR/WR/W
R/W
Bit
Name
Function
7:5
Reserved
Read returns zero.
4CALM1
Monitor ADC Calibration 1.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
3CALM2
Monitor ADC Calibration 2.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
2CALDAC
DAC Calibration.
Setting this bit begins calibration of the audio DAC offset.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
1
CALADC
ADC Calibration.
Setting this bit begins calibration of the audio ADC offset.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
0CALCM
Common Mode Balance Calibration.
Setting this bit begins calibration of the ac longitudinal balance.
0 = Normal operation or calibration complete.
1 = Calibration enabled or in progress.
Register 98. RING Gain Mismatch Calibration Result
Bit
D7
D6D5D4
D3D2
D1D0
Name
CALGMR[4:0]
Type
R/W
Bit
Name
Function
7:5
Reserved
Read returns zero.
4:0
CALGMR[4:0]
Gain Mismatch of IE Tracking Loop for RING Current.
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