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參數(shù)資料
| 型號： | sda 9362 |
| 廠商： | SIEMENS AG |
| 英文描述： | DDC-PLUS-Deflection Controller(DDC 過偏轉(zhuǎn)控制器) |
| 中文描述： | DDC的加偏轉(zhuǎn)控制器（DDC的過偏轉(zhuǎn)控制器） |
| 文件頁數(shù)： | 5/39頁 |
| 文件大?。?/td> | 199K |
| 代理商： | SDA 9362 |
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P-MQFP-44-2
Semiconductor Group
5
1998-02-01
DDC-PLUS-Deflection Controller
SDA 9362
MOS
Type
SDA 9362
Ordering Code
Q67101-H5173-A701
Package
P-MQFP-44-2
1
Overview
1.1
Deflection - Protection - 16:9 / 4:3
Ι
2
C Bus alignment of all deflection parameters
All EW-, V- and H-functions (incl.
Φ
2)
PW EHT compensation
PH EHT compensation
Compensation of H-phase deviation
(e.g. caused by white bar)
Upper/lower EW-corner correction separately adjustable
V-angle correction: Vertical frequent linear modulation of H-phase
V-bow correction: Vertical frequent parabolic modulation of H-phase
Three reduced V-scan modes (75 %, 66 %, 50 % V-size) selectable
H- and V-blanking time adjustable
Partial overscan adjustable to hide the cut off control measuring lines in the reduced
scan modes
Stop/start of vertical deflection adjustable to fill out the 16/9 screen with different
letterbox formats without annoying overscan
Dynamic PH EHT-compensation (white bar)
Self adaptation of V-frequency/number of lines per field between 192 and 680 for each
possible line frequency
Protection against EHT run away (X-rays protection)
Protection against missing V-deflection (CRT-protection)
Two digital outputs for general purpose, controlled by
Ι
2
C Bus
Selectable softstart of the H-output stage
P-MQFP-44-2 package
5 V supply voltage
Features
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