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參數(shù)資料
| 型號(hào)： | sda 9362 |
| 廠商： | SIEMENS AG |
| 英文描述： | DDC-PLUS-Deflection Controller(DDC 過偏轉(zhuǎn)控制器) |
| 中文描述： | DDC的加偏轉(zhuǎn)控制器（DDC的過偏轉(zhuǎn)控制器） |
| 文件頁數(shù)： | 19/39頁 |
| 文件大?。?/td> | 199K |
| 代理商： | SDA 9362 |
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SDA 9362
Semiconductor Group
19
1998-02-01
NI:
Non interlace
0:
interlace depends on source
1:
no interlace
The
Internal Voltage Ref Control Byte
includes the following bits:
BANDG5 ...
Adjustment of internal bandgap reference
BANDG0:100000: Reference Output voltage min
:
011111: Reference Output voltage max
Typical adjustment range is 1 V.
BANDGOFF: Bandgap off
0:
1:
V
REFH
,
V
REFL
derived internally from
V
REFP
external references on
V
REFP
,
V
REFH
,
V
REFL
have to be applied
(in this case BANDG4OFF must be = 1)
BANDG4OFF: Bandgap 4 V off
0:
1:
internal bandgap reference is used for
V
REFP
external reference on
V
REFP
(4 V) has to be applied
The
Status Byte
includes the following bits
HPON:
H-protection on
0:
normal operation of the line output stage
1:
high level on input HPROT has switched off the line
VPON:
V-protection on
0:
normal operation of the vertical output stage
1:
incorrect signal on input VPROT has switched off the line
BANDG5 BANDG4 BANDG3 BANDG2 BANDG1 BANDG0
BANDG
OFF
BANDG4
OFF
HPON
VPON
–
–
–
–
–
PONRES
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