參數(shù)資料
型號(hào)： SCM20014
廠商： Motorola, Inc.
英文描述： VGA Digital Image Sensor(VGA數(shù)字圖像傳感器)
中文描述： VGA數(shù)碼圖像傳感器（顯卡數(shù)字圖像傳感器）
文件頁數(shù)： 44/54頁
文件大小： 911K
代理商： SCM20014
MOTOROLA
SCM20014
44
Preliminary!! Last Update: 12/14/99
6.8 I2C Bus Clocking and Synchronization
Open drain outputs are used on the SCLK outputs of all
master and slave devices so that the clock can be syn-
chronized and stretched using wire-AND logic. This
means that the slowest device will keep the bus from
going faster than it is capable of receiving or transmit-
ting data.
After the master has driven SCLK from High to Low, all
the slaves drive SCLK Low for the required period that
is needed by each slave device and then releases the
SCLK bus. If the slave SCLK Low period is greater than
the master SCLK Low period, the resulting SCLK bus
signal Low period is stretched. Therefore, synchronized
clocking occurs since the SCLK is held low by the de-
vice with the longest Low period. Also, this method can
be used by the slaves to slow down the bit rate of a
transfer. The master controls the length of time that the
SCLK line is in the High state. The data on the SDATA
line is valid when the master switches the SCLK line
from a High to a Low.
Slave devices may hold the SCLK low after completion
of one byte transfer (9 bits). In such case, it halts the bus
clock and forces the master clock into wait states until
the slave releases the SCLK line.
6.9 Register Write
Writing the SCM20014 registers is accomplished with
the following I2C transactions (see
Figure 25
):
Master transmits a START
Master transmits the SCM20014 Slave Calling Ad-
dress with “WRITE” indicated (BYTE=66
h
, 102
d
,
01100110
b
)
SCM20014 slave sends acknowledgment by forc-
ing the SDATA Low during the 9th clock, if the Call-
ing Address was received
Master transmits the SCM20014 Register Address
SCM20014 slave sends acknowledgment by forc-
ing the SDATA Low during the 9th clock after re-
ceiving the Register Address
Master transmits the data to be written into the reg-
ister at the previously received Register Address
SCM20014 slave sends acknowledgment by forc-
ing the SDATA Low during the 9th clock after re-
ceiving the data to be written into the Register
Address
Master transmits STOP to end the write cycle
6.10 Register Read
Reading the SCM20014 registers is accomplished with
the following I2C transactions (see
Figure 26
):
Master transmits a START
Master transmits the SCM20014 Slave Calling Ad-
dress with “WRITE” indicated (BYTE=66
h
, 102
d
,
01100110
b
)
SCM20014 slave sends acknowledgment by forc-
ing the SData Low during the 9th clock, if the Calling
Address was received
Master transmits the SCM20014 Register Address
SCM20014 slave sends acknowledgment by forc-
ing the SData Low during the 9th clock after receiv-
ing the Register Address
Master transmits a Repeated START
Master transmits the SCM20014 Slave Calling Ad-
dress with “READ” indicated (BYTE = 67
h,
103
d
,
01100111
b
)
SCM20014 slave sends acknowledgment by forc-
ing the SDATA Low during the 9th clock, if the Call-
ing Address was received
At this point, the SCM20014 transitions from a
“Slave-Receiver” to a “Slave-Transmitter”
SCM20014 sends the SCLK and the Register Data
contained in the Register Address that was previ-
ously received from the master; SCM20014 transi-
tions to slave-receiver
Master does not send an acknowledgment (NAK)
Master transmits STOP to end the read cycle
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