參數(shù)資料
型號(hào): SCM20014
廠商: Motorola, Inc.
英文描述: VGA Digital Image Sensor(VGA數(shù)字圖像傳感器)
中文描述: VGA數(shù)碼圖像傳感器(顯卡數(shù)字圖像傳感器)
文件頁(yè)數(shù): 12/54頁(yè)
文件大?。?/td> 911K
代理商: SCM20014
MOTOROLA
SCM20014
12
Preliminary!! Last Update: 12/14/99
This feature allows the user to extend battery life in low
power applications.
By utilizing this mode, the user may reduce dynamic
power consumption from 400mW, in the active process-
ing, 13 Million Samples per Second mode, to <50 mW
in the standby mode (note that dynamic power con-
sumption is also reduced in slower conversion speed
applications).
The standby mode is activated by applying an active
high signal to the STBY pin (#27). The sensor can also
be put in the stand by mode via bit <0> on the Power
Configuration Register (OC
h
)
The user may also reduce power consumption in the ac-
tive processing mode by placing the SCM20014’s out-
puts in the tri-state mode. This action may be
accomplished by placing the TS pin in the active high
state. This action can also accomplished by setting the
dbt
bit on the
Power Configuration Register; Table 14
,
(0C
h
).
2.4.3 References CVREFP, CVREFM
The SCM20014 contains all internally generated refer-
ences and biases on-chip for system simplification. An
internally generated differential bandgap regulator de-
rives all the ADC and other analog signal processing re-
quired references. The user should connect 0.1
μ
F
capacitors to the CVREFP and CVREFM pins (#19 and
#18 respectively) to accurately hold the biases.
2.4.4 Internal Timing Control Register
The
Internal Timing Control Register; Table 28
allows
control over pulse widths of critical internal timing sig-
nals. The user must write an 00
h
into this address loca-
tion to assure proper operation of the SCM20014.
2.4.5 Internal Bias Current Control
The ASP chain has internally generated bias currents
that result in an operating power consumption of nearly
400mW. By attaching a resistor between pin 13, EX-
TRES; and ground, the user can reduce the power con-
sumption of the device. This feature is enabled by
writing a 1
b
to bit
res
of the
Power Configuration Regis-
ter
.
Figure 14
depicts the power savings that can be
achieved with an external resistor at a specific clock
rate. Additional power savings can be acheived at lower
clock rates.
Figure 14. External Resistor Effect on Power Consumption at 13.5Mhz MCLK
10
20
30
40
50
60
200
300
400
500
600
100
External Resistor (k
)
A
)
Internal Resistor Power Consumption
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