參數(shù)資料
型號: SC16IS741IPW
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
中文描述: 1 CHANNEL(S), 5M bps, I2C BUS CONTROLLER, PDSO16
封裝: 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
文件頁數(shù): 44/52頁
文件大?。?/td> 382K
代理商: SC16IS741IPW
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
44 of 52
NXP Semiconductors
SC16IS741
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
Table 35.
All the timing limits are valid within the operating supply voltage, ambient temperature range and output load;
V
DD
= 2.5 V
±
0.2 V, T
amb
=
40
°
C to +85
°
C; or V
DD
= 3.3 V
±
0.3 V, T
amb
=
40
°
C to +95
°
C; and refer to V
IL
and V
IH
with
an input voltage of V
SS
to V
DD
. All output load = 25 pF, unless otherwise specified.
Symbol
Parameter
Conditions
t
TR
CS HIGH to SO 3-state delay time
C
L
= 100 pF
t
CSS
CS to SCLK setup time
t
CSH
CS to SCLK hold time
t
DO
SCLK fall to SO valid delay time
C
L
= 100 pF
t
DS
SI to SCLK setup time
t
DH
SI to SCLK hold time
t
CP
SCLK period
t
CL
+ t
CH
t
CH
SCLK HIGH time
t
CL
SCLK LOW time
t
CSW
CS HIGH pulse width
t
d(int_clr)tx
transmit interrupt clear delay time
t
d(int_clr)rx
receive interrupt clear delay time
t
w(rst)
reset pulse width
SPI-bus timing specifications
Min
-
100
20
-
100
20
250
100
100
200
200
200
3
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
100
-
-
100
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μ
s
Fig 30. Detailed SPI-bus timing
t
CSH
t
CSS
t
CL
t
CH
t
CSH
t
DO
t
TR
t
DS
t
DH
SO
SI
SCLK
CS
002aab066
t
CSW
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