參數(shù)資料
型號: SC16IS741IPW
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
中文描述: 1 CHANNEL(S), 5M bps, I2C BUS CONTROLLER, PDSO16
封裝: 4.40 MM, PLASTIC, MO-153, SOT403-1, TSSOP-16
文件頁數(shù): 23/52頁
文件大?。?/td> 382K
代理商: SC16IS741IPW
SC16IS741_1
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 29 April 2010
23 of 52
NXP Semiconductors
SC16IS741
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
8.6 Modem Control Register (MCR)
The MCR controls the interface with the mode, data set, or peripheral device that is
emulating the modem.
Table 17
shows the Modem Control Register bit settings.
Table 17.
Bit
7
[1]
MCR[7:5] and MCR[2] can only be modified when EFR[4] is set, that is, EFR[4] is a write enable.
Modem Control Register bits description
Symbol
Description
MCR[7]
[1]
clock divisor
logic 0 = divide-by-1 clock input
logic 1 = divide-by-4 clock input
MCR[6]
[1]
IrDA mode enable
logic 0 = normal UART mode
logic 1 = IrDA mode
MCR[5]
[1]
Xon Any
logic 0 = disable Xon Any function
logic 1 = enable Xon Any function
MCR[4]
enable loopback
logic 0 = normal operating mode
logic 1 = enable local Loopback mode (internal). In this mode the MCR[1:0]
signals are looped back into MSR[4:5] and the TX output is looped back to
the RX input internally.
MCR[3]
reserved
MCR[2]
TCR and TLR enable
logic 0 = disable the TCR and TLR register.
logic 1 = enable the TCR and TLR register.
MCR[1]
RTS
logic 0 = force RTS output to inactive (HIGH)
logic 1 = force RTS output to active (LOW). In Loopback mode, controls
MSR[4]. If Auto RTS is enabled, the RTS output is controlled by hardware
flow control.
MCR[0]
reserved
6
5
4
3
2
1
0
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