參數(shù)資料
型號(hào): SC16C2552BIA44
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit-s (max.), with 16-byte FIFOs
封裝: SC16C2552BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 49, 2004,;SC16C2552BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html
文件頁(yè)數(shù): 22/38頁(yè)
文件大?。?/td> 179K
代理商: SC16C2552BIA44
SC16C2552B_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 12 February 2009
22 of 38
NXP Semiconductors
SC16C2552B
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
7.11 SC16C2552B external reset condition
8.
Limiting values
Table 21.
Register
IER
ISR
LCR
MCR
LSR
MSR
FCR
AFR
Reset state for registers
Reset state
IER[7:0] = 0
ISR[7:1] = 0; ISR[0] = 1
LCR[7:0] = 0
MCR[7:0] = 0
LSR[7] = 0; LSR[6:5] = 1; LSR[4:0] = 0
MSR[7:4] = input signals; MSR[3:0] = 0
FCR[7:0] = 0
AFR[7:0] = 0
Table 22.
Output
TXA, TXB
OP2A, OP2B
RTSA, RTSB
DTRA, DTRB
INTA, INTB
TXRDYA, TXRDYB
Reset state for outputs
Reset state
HIGH
HIGH
HIGH
HIGH
LOW
LOW
Table 23.
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
V
CC
supply voltage
V
n
voltage on any other pin
Limiting values
Conditions
Min
-
GND
0.3
GND
0.3
40
65
-
Max
7
V
CC
+ 0.3
5.3
+85
+150
500
Unit
V
V
V
°
C
°
C
mW
at D7 to D0 pins
at input only pins
T
amb
T
stg
P
tot
/pack
operating temperature
storage temperature
total power dissipation
per package
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