參數(shù)資料
型號(hào)： SAA7706H
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)字信號(hào)處理
英文描述： Car radio Digital Signal Processor (DSP)
封裝： SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html<1<Always Pb-free,;SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html&
文件頁(yè)數(shù)： 7/52頁(yè)
文件大小： 271K
代理商： SAA7706H
2001 Mar 05
7
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
SAA7706H
7
PINNING
SYMBOL
PIN
PIN TYPE
DESCRIPTION
VDACP
VDACN1
LEVEL
1
2
3
apio
apio
apio gsmcap
positive reference voltage ADC1, ADC2, ADC3 and level-ADC
ground reference voltage ADC1
LEVEL input pin; via this pin the level of the FM signal or level of the
AM signal is fed to the DSP1; the level information is used in the DSP1 for
dynamic signal processing
common mode reference input pin of the navigation signal (pin AM_L/NAV)
power-on mute of the QFSDAC; timing is determined by an external
capacitor
rear; right audio output of the QFSDAC
left channel of analog AUX input
right channel of analog AUX input
rear; left audio output of the QFSDAC
ground supply analog part of the QFSDAC and SPDIF bitslicer
positive supply analog part of the QFSDAC and SPDIF bitslicer
voltage reference of the analog part of QFSDAC
front; right audio output of the QFSDAC
common-mode reference input pin for analog CD_R or TAPE_R in the
event of separated ground reference pins for left and right are used
flag input/output 2 of the DSP2-core (DSP2-flag) I
2
C-bus configurable
front; left audio voltage output of the QFSDAC
flag input/output 1 of the DSP2-core (DSP2-flag) I
2
C-bus configurable
flag input/output 3 of the DSP2-core (DSP2-flag) I
2
C-bus configurable
flag input/output 4 of the DSP2-core (DSP2-flag) I
2
C-bus configurable
SYSCLK output (256f
s
)
for test purpose only; this pin may be left open or connected to ground
positive supply (peripheral cells only)
ground supply (peripheral cells only)
SPDIF input 2; can be selected instead of SPDIF1 via I
2
C-bus bit
SPDIF input 1; can be selected instead of SPDIF2 via I
2
C-bus bit
system f
s
clock input
digital CD-source word select input; I
2
S-bus or LSB-justified format
digital CD-source left-right data input; I
2
S-bus or LSB-justified format
digital CD-source clock input I
2
S-bus or LSB-justified format
clock output for external I
2
S-bus receiver; for example headphone or
subwoofer
data 1 input for external I
2
S-bus transmitter; e.g. audio co-processor
data 2 input for external I
2
S-bus transmitter; e.g. audio co-processor
word select output for external I
2
S-bus receiver; for example headphone or
subwoofer
data 1 output for external I
2
S-bus receiver or co-processor
data 2 output for external I
2
S-bus receiver or co-processor
NAV_GND
POM
4
5
apio gsmcap
apio
RRV
AUX_L
AUX_R
RLV
V
SSA2
V
DDA2
VREFDA
FRV
CD_R_GND
6
7
8
9
10
11
12
13
14
apio
apio
apio
apio
vssco
vddco
apio
apio
apio
DSP2_INOUT2
FLV
DSP2_INOUT1
DSP2_INOUT3
DSP2_INOUT4
LOOPO
TP1
V
DDD3V7
V
SSD3V7
SPDIF2
SPDIF1
SYSFS
CD_WS
CD_DATA
CD_CLK
IIS_CLK
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
bpts5thdt5v
apio
bpts5thdt5v
bpts5thdt5v
bpts5thdt5v
bpts5tht5v
ipthdt5v
vdde
vsse
apio
apio
ipthdt5v
ipthdt5v
bpts10thdt5v
ipthdt5v
ots10ct5v
IIS_IN1
IIS_IN2
IIS_WS
31
32
33
ipthdt5v
ipthdt5v
ots10ct5v
IIS_OUT1
IIS_OUT2
34
35
ots10ct5v
ots10ct5v
相關(guān)PDF資料
PDF描述
SATURN CDMA/AMPS dual Band IF Receiver for Digital Phones
SA N-CHANNEL POWER MOSFET
SB12100 Schottky Barrier Rectifiers
SB1220 Schottky Barrier Rectifiers
SB1230 Schottky Barrier Rectifiers
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7706H/N107 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107,518 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC DIRAC-1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107,557 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC DIGITAL SIGNAL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107S,518 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC CAR RADIO DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107S,557 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC INTEGRATED RDS/TMC RECEIVER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*