參數(shù)資料
型號： SAA7706H
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)字信號處理
英文描述： Car radio Digital Signal Processor (DSP)
封裝： SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html<1<Always Pb-free,;SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html&
文件頁數(shù)： 25/52頁
文件大小： 271K
代理商： SAA7706H
2001 Mar 05
25
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
SAA7706H
8.14
Digital serial inputs/outputs and SPDIF inputs
8.14.1
G
ENERAL DESCRIPTION DIGITAL SERIAL AUDIO
INPUTS
/
OUTPUTS
For communication with external digital sources a digital
serial bus is implemented. It is a serial 3-line bus, having
one line for data, one line for clock and one line for the
word select. For external digital sources the SAA7706H
acts as a slave, so the external source is master and
supplies the clock.
The digital serial input is capable of handling multiple input
formats. The input is capable of handling Philips I
2
S-bus
and LSB-justified formats of 16, 18, 20 and 24 bits word
sizes. The sampling frequency can be either
44.1 or 48 kHz. See Fig.15 for the general waveform
formats of all possible formats.
The number of bit clock (BCK) pulses may vary in the
application. When the applied word length is smaller than
24 bits (internal resolution of DSP2), the LSB bits will get
internally a zero value; when the applied word length
exceeds 24 bits then the LSBs are skipped.
It should be noted that:
Two digital sources can not be used at the same time
Maximum number of bit clocks per word select (WS) is
limited to 64
The word select (WS) must have a duty cycle of 50%.
8.14.2
G
ENERAL DESCRIPTION
SPDIF
INPUTS
(SPDIF1
AND
SPDIF2)
For communication with external digital sources also an
SPDIF input can be used. The two SPDIF input pins can
be connected via an analog multiplexer to the SPDIF
receiver. It is a receiver without an analog PLL that
samples the incoming SPDIF with a high frequency. In this
way the data is recovered synchronously on the applied
system clock.
From the SPDIF signal a three wire serial bus
(e.g. I
2
S-bus) is made, consisting of a word select, data
and bit clock line. The sample frequency f
s
depends solely
on the SPDIF signal input accuracy and both 44.1 and
48 kHz are supported.
This chip does not handle the user data bits, channel
status bits and validity bits of the SPDIF stream, but only
the audio is given at its outputs. Some rom_codes do take
care of the pre-emphasis bit of the SPDIF stream.
Thebitsintheaudiospacearealwaysdecodedregardless
of any status bits e.g. ‘copy protected’, ‘professional mode’
or ‘data mode’. The DAC is not muted in the event of a
non-linear PCM audio, however the bit is observable via
the I
2
C-bus. A few other channel status bits are available.
There are 5 control signals available from the SPDIF input
stage. These are connected to flags of DSP2. For more
details see separate manual.
These 5 control signals are:
Signals to indicate the sample frequency of the SPDIF
signal: 44.1 and 48 kHz (32 kHz is not supported)
A lock signal indicating if the SPDIF input is in lock
The pre-emphasis bit of the SPDIF audio stream
Thepcm_audio/non-pcm_audiobitindicatingifanaudio
or data stream is detected. The FSDAC output will not
be muted in the event of a non-audio PCM stream. This
status bit can be read via the I
2
C-bus, the
microcontroller can decide to mute the DAC (via
pin POM).
The design fulfils the digital audio interface specification
“IEC 60958-1 Ed2, part 1, general part IEC 60958-3 Ed2,
part 3, consumer applications”
It should be noted that:
The SPDIF input may only be used in the ‘consumer
mode’ specified in the digital audio interface
specification
Only one of the two SPDIF sources can be used
(selected) at the same time
The FSDAC will not (automatically) be muted in the
event of a non-audio stream
Two digital sources can not be used at the same time
Supported sample frequencies are 44.1 and 48 kHz.
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SAA7706H/N107 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107,518 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIRAC-1 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107,557 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC DIGITAL SIGNAL RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107S,518 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC CAR RADIO DIGITAL SIGNAL PROCESSOR RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SAA7706H/N107S,557 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC INTEGRATED RDS/TMC RECEIVER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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