參數(shù)資料
型號: SAA7706H
廠商: NXP Semiconductors N.V.
元件分類: 數(shù)字信號處理
英文描述: Car radio Digital Signal Processor (DSP)
封裝: SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html<1<Always Pb-free,;SAA7706H/N109S<SOT318-2 (QFP80)|<<http://www.nxp.com/packages/SOT318-2.html&
文件頁數(shù): 19/52頁
文件大?。?/td> 271K
代理商: SAA7706H
2001 Mar 05
19
Philips Semiconductors
Product specification
Car radio Digital Signal Processor (DSP)
SAA7706H
The outputs of the stereo decoder to the DSP1, which are
all running on a sample frequency of 38 kHz are:
Pilotpresenceindication:pilot-I.This1-bitsignalisLOW
for a pilot frequency deviation <4 kHz and HIGH for a
pilot frequency deviation >4 kHz and locked on a pilot
tone.
‘Left’ and ‘right’ FM reception stereo signal: this is the
18-bit output of the stereo decoder after the matrix
decoding.
Noise level (see also Section 8.4.1): which is retrieved
from the high-pass output of the MPX filter. The noise
level is detected and filtered in the DSP1 and is used to
optimize the FM weak signal processing.
Normally the FM_MPX input and the FM_RDS input have
the same source. If the FM input contains a stereo radio
channel, the pilot information is switched to the Digitally
Controlled Sampling (DCS) clock generation and the DCS
clock is locked to the 256
×
38 kHz of the pilot. In this case
this locked frequency is also used for the RDS path
ensuring the best possible performance.
Except from the above mentioned theoretical response
also the non-flat frequency response of the ADC has to be
compensated in the DSP1 program.
handbook, full pagewidth
0
10
MGT467
30
70
60
50
40
20
100
80
20
0
60
40
f (kHz)
α
(dB)
Fig.11 Transfer of MPX signal at the output of the stereo decoder.
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