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參數(shù)資料
| 型號： | SAA7186 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Digital video scaler |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, SOT-317-2, QFP-100 |
| 文件頁數(shù)： | 19/44頁 |
| 文件大?。?/td> | 223K |
| 代理商： | SAA7186 |
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May 1993
19
Philips Semiconductors
Preliminary specification
Digital video scaler
SAA7186
7.13
Field processing
The phase of the field sequence (odd/even dependent on
inputs HREF and VS) is detected by means of the falling
edge of VS. The current field phase is reported in the
status byte by the OEF bit (Table 5). OEF bit can be stable
0 or 1 for non-interlaced input frames or non standard input
signals VS and/or HREF (nominal condition for VS and
HREF
SAA7191 B with active vertical noise limiter). A
free-running odd/even flag is generated for internal field
processing if the detection reports a stable OEF bit.
The POE bit (subaddress 0B) can be used to change the
polarity of the internal flag (in case of non-standard VS and
HREF signals) to control the phase of the free-running flag,
and to compensate mis-detections. Thus, the SAA7186
can be used under various VS/HREF timing conditions.
The SAA7186 operates on fields. To support progressive
displays and to avoid movement blurring and artifacts, the
circuit can process both or single fields of interlaced or
non-interlaced input data. Therefore the OF bits can be
used. The bits OF1 and OF0 (Table 6) determine the
INCADR/HFL generation in “data burst transfer mode”.
One of the fields (odd or even) is ignored when OF1 = 1;
then no line increment sequence (INCADR/HFL) is
generated, the vertical reset pulse is only generated.
With OF1 = OF0 = 0 the circuit supports correct interlaced
data storage. Two INCADR/HFL sequences are generated
in each qualified line; additionally an INCADR/HFL
sequence after the vertical reset sequence of an odd field
is generated. Thereby, the scaled lines are automatically
stored in the right sequence.
8
OPERATION CYCLE
The operation is synchronized by the input field. The cycle
is specified in the flow chart (Fig.9).
The circuit is inactive after power-on reset, VPO is 0 and
the FIFO control is set “empty”. The internal control
registers are updated with the falling edge of VS signal.
The circuit is switched active and waits for a transmission
of VS and a vertical reset sequence to the memory
controller. Afterwards, the circuit waits for the beginning of
a scaling or bypass region. The processing of a current line
is finished when a vertical sync pulse appears. The circuit
performs a coefficient update and generates a new vertical
reset (if it is still active).
Line processing starts when a line is decided to be active,
the circuit starts to scale it. Active pixels are loaded into the
FIFO register. An HFL flag is generated to initialize a data
transfer when eight words are completed. The line end is
reached when the programmed pixel number is processed
or when a horizontal sync pulse occurs. If there are pixels
in the FIFO register, it is filled up until it is half-full to cause
a data transfer. Horizontal increment pulses are
transmitted after this data transfer.
Remarks:
The SAA7186 will always wait for the HREF/VS pulse
before the line increment/vertical reset sequence is
performed. After each line/field, the FIFO control is set to
empty when INCADR/HFL sequence is transmitted.
No additional actions are necessary if the memory
controller has ignored the HFL signal. There is no need to
handle overflow/underflow of the FIFO register.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7188 | Digital Video Encoder DENC2-M |
| SAA7188AWP | AXIAL LEADED TUBULAR ALUMINUM RoHS Compliant: No |
| SAA7199 | Digital Video Encoder DENC GENLOCK-capable |
| SAA7199BWP | Digital Video Encoder DENC GENLOCK-capable |
| SAA7199B | ; Capacitance:1uF; Capacitance Tolerance:+/- 10 %; Working Voltage, DC:100V; Terminal Type:Axial Leaded; Series:430P; Dielectric Material:Metalized Polyester; Mounting Type:Through Hole; Operating Temp. Max:85 C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7186H | 制造商:NXP Semiconductors 功能描述:Factory Sealed Trays (120 Per box) |
| SAA7187 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital video encoder DENC2-SQ |
| SAA7187WP | 制造商:NXP Semiconductors 功能描述: |
| SAA7188 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2-M |
| SAA7188A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital Video Encoder DENC2-M |
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