參數(shù)資料
型號(hào)： SAA7186
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Digital video scaler
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, SOT-317-2, QFP-100
文件頁(yè)數(shù)： 14/44頁(yè)
文件大?。?/td> 223K
代理商： SAA7186
May 1993
14
Philips Semiconductors
Preliminary specification
Digital video scaler
SAA7186
Table 3
VRAM port output data formats at
EFE-bit = 1
dependent on FS1 and FS0 bits (set via I
2
C-bus)
Notes
1.
α
= keying bit; R, G, B, Y, U and V = digital signals; e = even pixel number; o = odd pixel number;
a b c d = consecutive pixels; O/E = odd/even flag
YUV 16-bit format: the keying signal
α
is defined only for YU time steps. The corresponding YV sample has also to
be keyed. The
α
signal in monochrome mode can be used only in the transparent mode (TTR = 1), in this case
Ya = Yb.
Data valid only when transparent mode active (TTR-bit = 1) and VCLK pin connected to LLC/2 clock rate.
2.
3.
PIXEL
OUTPUT
BITS
FS1 = 0; FS0 = 0
RGB 5-5-5
+
1
16-BIT WORDS
FS1 = 0; FS0 = 1
YUV 4:2:2
16-BIT WORDS
FS1 = 1; FS0 = 0
RGB 8-8-8
24-BIT WORDS
FS1 = 1; FS0 = 1
8-BIT MONOCHROME
16-BIT WORDS
PIXEL
ORDER
n
α
R4
R3
R2
R1
R0
G4
G3
G2
G1
G0
B4
B3
B2
B1
B0
n
+
1
α
R4
R3
R2
R1
R0
G4
G3
G2
G1
G0
B4
B3
B2
B1
B0
n
+
2
α
R4
R3
R2
R1
R0
G4
G3
G2
G1
G0
B4
B3
B2
B1
B0
n
n
+
1
Yo7
Yo6
Yo5
Yo4
Yo3
Yo2
Yo1
Yo0
Ve7
Ve6
Ve5
Ve4
Ve3
Ve2
Ve1
Ve0
n
+
2
Ye7
Ye6
Ye5
Ye4
Ye3
Ye2
Ye1
Ye0
Ue7
Ue6
Ue5
Ue4
Ue3
Ue2
Ue1
Ue0
n
n
+
1
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
n
+
2
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
n
n
+
1
Ya7
Ya6
Ya5
Ya4
Ya3
Ya2
Ya1
Ya0
Yb7
Yb6
Yb5
Yb4
Yb3
Yb2
Yb1
Yb0
n
+
2
n
+
3
Ya7
Ya6
Ya5
Ya4
Ya3
Ya2
Ya1
Ya0
Yb7
Yb6
Yb5
Yb4
Yb3
Yb2
Yb1
Yb0
n
+
4
n
+
5
Ya7
Ya6
Ya5
Ya4
Ya3
Ya2
Ya1
Ya0
Yb7
Yb6
Yb5
Yb4
Yb3
Yb2
Yb1
Yb0
VRO31
VRO30
VRO29
VRO28
VRO27
VRO26
VRO25
VRO24
VRO23
VRO22
VRO21
VRO20
VRO19
VRO18
VRO17
VRO16
Ye7
Ye6
Ye5
Ye4
Ye3
Ye2
Ye1
Ye0
Ue7
Ue6
Ue5
Ue4
Ue3
Ue2
Ue1
Ue0
R7
R6
R5
R4
R3
R2
R1
R0
G7
G6
G5
G4
G3
G2
G1
G0
PIXEL
ORDER
n
n
+
1
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
+
2
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
n
+
1
X
X
X
X
X
X
X
X
X
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
+
2
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
n
+
1
B7
B6
B5
B4
B3
B2
B1
B0
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
+
2
B7
B6
B5
B4
B3
B2
B1
B0
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
n
+
1
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
+
2
n
+
3
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
n
+
4
n
+
5
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
VRO15
VRO14
VRO13
VRO12
VRO11
VRO10
VRO9
VRO8
VRO7 (2, 3)
VRO6 (3)
VRO5 (3)
VRO4 (3)
VRO3
VRO2 (3)
VRO1 (3)
VRO0 (3)
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
X
X
X
X
X
X
X
X
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
B7
B6
B5
B4
B3
B2
B1
B0
α
O/E
VGT
HGT
X
HRF
LNQ
PXQ
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