參數(shù)資料
型號(hào): SAA7146AH
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 消費(fèi)家電
英文描述: .012UF/400VDC METAL POLY CAP
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, SOT322-2, MS-022, QFP-160
文件頁(yè)數(shù): 75/144頁(yè)
文件大?。?/td> 645K
代理商: SAA7146AH
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1998 Apr 09
75
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
1
17
to
1
18
(964)
16
1111 1111 1 1 1111 1111
2212 2212 2 2 2122 2122
1222 2222 1 1 2222 2221
...
1111 2222 1111
1111 2222 1111
1121 1212 1121
1211 2121 1211
FF, 00
44, BB
01, FE
...
0F, F0
18
32
32
...
32
3
4
4
...
4
16
18
1
1
...
1
...
...
22
1
23
to
1
24
(980)
AD, 52
32
4
1
VERTICAL
SCALE
RATIO
YACL
COEFFICIENT
SEQUENCE (EXAMPLE)
CYA; CYB
WEIGHT
SUM
DCGY
BCS
(CONTR. | SAT.)
= X/Y
×
64
7.9.2.6
LPI mode (scaling factor range 1 to
1
2
; register
bit YACM = 0)
To preserve the signal quality for slight vertical
downscales (scaling factors 1 to
1
2
) Linear Phase
Interpolation (LPI) between consecutive lines is
implemented to generate geometrically correct vertical
output lines. Thus, the new geometric position between
lines N and N + 1 can be calculated.
A new output line is calculated by weighting the samples
‘p’ of lines N and N + 1 with the normalized distance to the
newly calculated position:
p(M) = A
×
p(N + 1) + (1
A)
×
p(N); where A = 0 to
63
64
.
With N
OL
= Number of Output Lines and N
IL
= Number of
Input Lines the scaler register bits YSCI (scaling
increment) and YP (scaling start phase) have to be set
according to the following equations:
YSCI = INT [1024
×
(N
IL
/(N
OL
1)] scaling increment
YPx = INT [
YSCI
16
] scaling start phase (recommended
value).
Fig.22 Calculation of output lines.
handbook, halfpage
MHB107
N Distance = 1 N
+
1
I
I
I
M
I
A
(1
A)
input lines
new calculated position line
of output line M
The vertical start phase offset is defined by
YP
64
(YP = 0 to 64):
YP = 0: offset = 0 geometrical position of 1st
line
out
= 1st line
in
YP = 64: offset =
64
64
= 1 geometrical position of
1st line
out
= 2nd line
in
.
Finally 3 special modes are to be emphasized:
1.
Bypass
(YSCI = 0, YP = 64); each line
out
is equivalent
to corresponding line
in
2.
Low-pass
(YSCI = 0, YP < 64); e.g. YP = 32: average
value of 2 lines (1 + z
h
filter)
3.
For processing of
interlaced input
signals the LPI
mode must be used (ACCU mode would cause ‘line
pairing’ problems). The scaling start phase for odd and
even field have to be set to:
YP
even
=
3
2
×
YP
odd
(line 1 = odd)
In modes 1 and 2 the first input line is fed to the output
(without processing), so that the number of output lines
equals the number of input lines
7.9.2.7
Flip option (Mirror = 1)
For both vertical scaling modes there is a flip option
‘mirroring’ available for input lines with a maximum of
384 pixels. In the case of full screen pictures (e.g.
768
×
576) that have to be flipped, they first have to be
downscaled to 384 pixel/line in the horizontal prescaling
unit and after vertical processing (flipping) they may be
rezoomed to the original 768 pixels/line in the following
VPD.
It should be noted that, when using the flip option, the last
input line can not be displayed at the output.
相關(guān)PDF資料
PDF描述
SAA7146A Multimedia bridge, high performance Scaler and PCI circuit SPCI
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SAA7146AH/V3,557 制造商:NXP Semiconductors 功能描述:
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SAA7146AH-V4.557 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit
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SAA7151 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multistandard colour decoder with SCART interface DMSD2-SCART