參數(shù)資料
型號(hào): SAA7146AH
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: .012UF/400VDC METAL POLY CAP
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, SOT322-2, MS-022, QFP-160
文件頁數(shù): 18/144頁
文件大?。?/td> 645K
代理商: SAA7146AH
1998 Apr 09
18
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
7.2
PCI interface
This section describes the interface of the SAA7146A to
the PCI-bus. This includes the PCI modules, the DMA
controls of the video, audio and data channels, the
Memory Management Unit (MMU) and the Internal
Arbitration Control (INTAC). The handling of the FIFOs
and the corresponding errors are also described and a list
of all DMA control registers is given.
7.2.1
PCI
MODULES AND CONFIGURATION SPACE
The SAA7146A provides a PCI-bus interface having both
slave and master capability. The master and the slave
module fulfil the PCI local bus specification revision 2.1.
They decode the C/BE# lines to provide a byte-wise
access and support 32-bit transfers up to a maximum clock
rate of 33 MHz. To increase bus performance, they are
able to handle fast back-to-back transfers.
During normal operation the SAA7146A checks for parity
errors and reports them via the PERR# pin. If an address
parity error is detected the SAA7146A will not respond.
Using the SAA7146A as a slave, access is obtained only
to the programmable registers and to its configuration
space. Video, audio and other data of the SAA7146A
reads/writes autonomously via the master interface (see
Fig.4). The use of the PCI master module, i.e. which DMA
channel gets access to the PCI-bus, is controlled by the
INTAC (see Section 7.2.5).
The registers described in Table 1 are closely related to
the PCI specification. It should be noted that Header type,
Cache Line Size, BIST, Card bus CIS Pointer and
Expansion ROM Base Address Registers are not
implemented. All registers, which are not implemented are
treated as read only with a value of zero. Some values are
loaded after PCI reset via I
2
C-bus from EEPROM with
device address 1010000 (binary). This loading will take
approximately 1 ms at 33 MHz PCI clock. If any device
tries to read or write data from or to the SAA7146A during
the loading phase after reset, the SAA7146A will
disconnect with retry.
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參數(shù)描述
SAA7146AH/V3,557 制造商:NXP Semiconductors 功能描述:
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SAA7146AH-V4.557 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit
SAA7146AHZ 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Multimedia bridge, high performance Scaler and PCI circuit SPCI
SAA7151 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital multistandard colour decoder with SCART interface DMSD2-SCART