
1996 Sep 04
6
Philips Semiconductors
Objective specification
High Performance Scaler (HPS)
SAA7140A; SAA7140B
5
PINNING (SAA7140A)
SYMBOL
PIN
I/O
DESCRIPTION
LLCIN
V
DDD(bord)1
V
SSD(bord)1
V
DDD(bord)2
LLC
CREF
HREF
VS
V
DDD(core)1
V
SSD(bord)2
YIN0
YIN1
YIN2
YIN3
YIN4
YIN5
YIN6
YIN7
V
DDD(bord)3
V
SSD(core)1
UVIN0
UVIN1
UVIN2
UVIN3
UVIN4
UVIN5
UVIN6
UVIN7
V
DDD(bord)4
V
SSD(bord)3
SDA
SCL
IICSA
V
DDD(bord)5
V
SSD(bord)4
V
DDD(bord)6
V
SSD(bord)5
PORT3
PORT2
PORT1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
line-locked system clock input; expansion port
digital border supply voltage 1 (+5 V)
digital border ground 1 (0 V)
digital border supply voltage 2 (+5 V)
line-locked system clock input, maximum 32 MHz (2
×
pixel rate); DMSD port
clock qualifier input (HIGH indicates valid input data YUV on DMSD port)
horizontal reference input signal; DMSD port
vertical sync input signal; DMSD port
digital core supply voltage 1 (+3.3 V)
digital border ground 2 (0 V)
luminance input data (bit 0); DMSD port
luminance input data (bit 1); DMSD port
luminance input data (bit 2); DMSD port
luminance input data (bit 3); DMSD port
luminance input data (bit 4); DMSD port
luminance input data (bit 5); DMSD port
luminance input data (bit 6); DMSD port
luminance input data (bit 7); DMSD port
digital border supply voltage 3 (+5 V)
digital core ground 1 (0 V)
time-multiplexed colour-difference input data (bit 0); DMSD port
time-multiplexed colour-difference input data (bit 1); DMSD port
time-multiplexed colour-difference input data (bit 2); DMSD port
time-multiplexed colour-difference input data (bit 3); DMSD port
time-multiplexed colour-difference input data (bit 4); DMSD port
time-multiplexed colour-difference input data (bit 5); DMSD port
time-multiplexed colour-difference input data (bit 6); DMSD port
time-multiplexed colour-difference input data (bit 7); DMSD port
digital border supply voltage 4 (+5 V)
digital border ground 3 (0 V)
serial data input/output (I
2
C-bus)
serial clock input (I
2
C-bus)
set address input (I
2
C-bus)
digital border supply voltage 5 (+5 V)
digital border ground 4 (0 V)
digital border supply voltage 6 (+5 V)
digital border ground 5 (0 V)
general purpose port 3 input/output (set via I
2
C-bus)
general purpose port 2 input/output (set via I
2
C-bus)
general purpose port 1 input/output (set via I
2
C-bus)
I/O
I
I
I/O
I/O
I/O