參數(shù)資料
型號: SAA7140A
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: High Performance Scaler HPS
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP128
文件頁數(shù): 55/68頁
文件大?。?/td> 432K
代理商: SAA7140A
1996 Sep 04
55
Philips Semiconductors
Objective specification
High Performance Scaler (HPS)
SAA7140A; SAA7140B
Table 68
Y (vertical) scaler accumulation (respectively calculation) mode of vertical arithmetic; data bit YACM
Table 69
Horizontal flip ‘mirroring’; maximum pixels after prescaling = 384; data bit FLIP
Table 70
Coefficient select for Y (vertical) processing in accumulation mode (notes 1 and 2); data bits CYA7 to CYA0
and CYB7 to CYB0 (15H to 35H and 16H to 36H)
Notes
1.
2.
For improvement of vertical filtering the accumulated lines can be weighted. Weighting factor = 2
(2
×
CYBi + CYAi
1)
The resulting factor as a function of a bit pattern CYAi, CYBi and the DC gain control DCGY, is given in
Tables 71 and 72.
Table 71
DC gain control of vertical scaler (see Table 2) (notes 1, 2 and 3) ; data bits DCGY2 to DCGY0 (17H to 37H)
Notes
1.
2.
3.
Dependent on active coefficients and the sequence length, the amplitude gain has to be renormalized.
Gain factor = 2
(DCGY + 1)
.
The resulting factor is a function of CYi and DCGY; 0 for (CYAi = CYBi = 0) or (CYAi = CYBi = 1 and DCGY = 0) or
(DGCY > 5). The weighting/gain factor is given in Table 72.
Table 72
Weighting factor as a function of gain factor
YACM
DESCRIPTION
0
1
arithmetic operates as a linear phase interpolator (LPI)
arithmetic operates as accumulating FIR filter in vertical direction
FLIP
DESCRIPTION
0
1
output lines correspond to input lines
output lines correspond flipped input lines (see Section 7.4.2)
CYBi
CYAi
CYi
WEIGHTING FACTOR
0
0
1
1
0
1
0
1
0
1
2
3
0
1
2
4
DCGY2
DCGY1
DCGY0
DCGY
GAIN FACTOR
0
0
...
...
1
0
0
0
1
0
1
2
4
....
....
1
....
....
1
....
....
7
....
....
256
CYI
DCGY0
DCGY1
DCGY2
DCGY3
DCGY4
DCGY5
DCGY6
DCGY7
0
1
2
3
0
1
2
1
0
0
1
4
1
2
1
0
1
8
1
4
1
2
0
0
0
0
0
0
0
0
0
0
0
1
16
1
8
1
4
1
32
1
16
1
8
1
64
1
32
1
16
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