參數(shù)資料
型號： SAA6703AH
廠商： NXP SEMICONDUCTORS
元件分類： 顯示控制器
英文描述： CRT OR FLAT PNL GRPH DSPL CTLR, PQFP160
封裝： 28 X 28 MM, 3.40 MM HEIGHT, PLASTIC, MS-022, SOT-322-2, QFP-160
文件頁數(shù)： 89/97頁
文件大?。?/td> 488K
代理商： SAA6703AH
2004 Apr 01
9
Philips Semiconductors
Product specication
XGA analog input at panel controller
SAA6703AH
VSSD(IC8)
122
internal digital core supply ground 8
VDDD(IC8)
123
internal digital core supply voltage 8 (2.5 V)
VSSD(EP8)
124
external digital pad supply ground 8
VDDD(EP8)
125
external digital pad supply voltage 8 (3.3 V)
CSG3
126
O
control signal generator 3 output
CSG4/A1
127
I/O
control signal generator 4 output (CSG4) or I2C-bus slave address input, latched
via hardware reset (A1)
RESERVED4
128
reserved for future use
RESERVED5
129
reserved for future use
RESERVED6
130
reserved for future use
VSSD(EP9)
131
external digital pad supply ground 9
VDDD(EP9)
132
external digital pad supply voltage 9 (3.3 V)
RESERVED7
133
reserved for future use
RESERVED8
134
reserved for future use
VCLK
135
I/O
sample clock input or output; congurable as output if generated internally
n.c.
136
do not connect
n.c.
137
do not connect
OUTEN
138
O
output enable status output
PWM
139
O
pulse width modulation for control of backlight brightness output
VSYNC
140
I/O
vertical sync input or output; congurable as output if decoded from composite
sync
HSYNC
141
I
horizontal and composite sync input
VSSD(EP10)
142
external digital pad supply ground 10
VDDD(EP10)
143
external digital pad supply voltage 10 (3.3 V)
VSSD(IC9)
144
internal digital core supply ground 9
VDDD(IC9)
145
internal digital core supply voltage 9 (2.5 V)
VSS(PLL)(P)
146
supply ground for panel clock phase locked loop
VDD(PLL)(P)
147
supply voltage for panel clock phase locked loop (2.5 V)
n.c.
148
do not connect
VSSA(PLL)(S)
149
analog supply ground for sample clock phase locked loop
VDDA(PLL)(S)
150
analog supply voltage for sample clock phase locked loop (2.5 V)
VSSD(PLL)(S)
151
digital supply ground for sample clock phase locked loop
VDDD(PLL)(S)
152
digital supply voltage for sample clock phase locked loop (2.5 V)
TRST
153
I
test reset input for boundary scan test (active LOW); note 2
TCK
154
I
test clock input for boundary scan test; note 2
TDI
155
I
test data input for boundary scan test; note 2
TMS
156
I
test mode select input for boundary scan test or scan test; note 2
TDO
157
O
test data output for boundary scan test
SYMBOL
PIN(1)
TYPE
DESCRIPTION
相關(guān)PDF資料
PDF描述
SAA7157T-T 29 MHz, VIDEO CLOCK GENERATOR, PDSO20
SAA7388GP-T 8-BIT, 50.4 MHz, MICROCONTROLLER, PQFP80
SAB-C163-16F25F 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP100
SAB-C165-L25F 16-BIT, 14 MHz, MICROCONTROLLER, PQFP100
SAB-C165-R25M 16-BIT, MROM, 14 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA6712E 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA RGB to TFT graphics engine
SAA6713AH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA analog input flat panel controller
SAA6713AH/V1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA analog input flat panel controller
SAA6713H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller
SAA6713H/V1 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:XGA dual input flat panel controller
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*