參數(shù)資料
型號(hào)： SAA3323H
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Drive processor for DCC systems
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, SOT-315-1, TQFP-80
文件頁(yè)數(shù)： 9/56頁(yè)
文件大小： 274K
代理商： SAA3323H
May 1994
9
Philips Semiconductors
Preliminary specification
Drive processor for DCC systems
SAA3323
A simplified block diagram of the SAA3323 is shown in
Fig.1.
DCC drive processing
The SAA3323 provides the following functions for the DCC
drive processing.
P
LAYBACK MODES
Analog-to-digital conversion
Tape channel equalization
Tape channel data and clock recovery
10-to-8 demodulation
Data placement in system RAM
C1 and C2 error correction decoding
Interfacing to sub-band serial PASC interface
Interfacing to microcontroller for SYSINFO and AUX
data
Capstan control for tape deck.
R
ECORD MODES
Interfacing to sub-band serial PASC interface
C1 and C2 error correction encoding
Formatting for tape transfer
8-to-10 modulation
Interfacing to microcontroller for SYSINFO and AUX
data
Capstan control for tape deck, programmable by
microcontroller.
S
EARCH MODE
Detection and interpretation of AUX envelope
information
AUX envelope counting
Search speed estimation.
Tape Formatting and Error (TFE) correction module
The TFE module has 3 basic modes of operation as shown
in Table 1.
Table 1
Basic modes of TFE module.
TFE
REGISTERS
The TFE module has 8 writable and 5 readable registers
that are accessible via the L3 interface, one write register
(CMD) and four read registers (STATUS0 to STATUS3)
which are directly addressable, the other registers are
indirectly addressable via commands sent to the CMD
register. The registers are named as shown in Table 2.
Table 2
TFE register names.
Note
1.
The 4 LSBs of register ‘SET3’ set RAM type (RType)
and RAM timing (RTim). See Table 3.
For normal operation the 4 MSBs of register ‘SET3’
should be logic 0.
MODE
EXPLANATION
DPAP
audio and SYSINFO (main data) play;
AUX play
audio and SYSINFO (main data) play;
AUX record
audio and SYSINFO (main data) record;
AUX record
DPAR
DRAR
REGISTER NAME
READ/WRITE
CMD
STATUS0
STATUS1
STATUS2
STATUS3
SET0
SET1
SET2
SET3
(1)
SPDDTY
BYTCNT
RACCNT
SPEED
W
R
R
R
R
W
W
W
W
W
W
W
R
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