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參數(shù)資料
| 型號： | S71AL016D02-B7 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和RAM |
| 文件頁數(shù)： | 29/76頁 |
| 文件大?。?/td> | 909K |
| 代理商： | S71AL016D02-B7 |
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August 4, 2004 S29AL016D_00_A1_E
S29AL016D
29
A d v a n c e I n f o r m a t i o n
During the unlock bypass mode, only the Unlock Bypass Program and Unlock By-
pass Reset commands are valid. To exit the unlock bypass mode, the system
must issue the two-cycle unlock bypass reset command sequence. The first cycle
must contain the data 90h; the second cycle the data 00h. Addresses are don’t
care for both cycles. The device then returns to reading array data.
Figure 3
illustrates the algorithm for the program operation. See the Erase/Pro-
gram Operations table in “AC Characteristics” for parameters, and to
Figure 17
for timing diagrams.
NOTE: See Table
9
for program command sequence.
Figure 3. Program Operation
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is ini-
tiated by writing two unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does
not
require
the system to preprogram prior to erase. The Embedded Erase algorithm auto-
matically preprograms and verifies the entire memory for an all zero data pattern
prior to electrical erase. The system is not required to provide any controls or tim-
ings during these operations. Table
9
shows the address and data requirements
for the chip erase command sequence.
START
Write Program
Command Sequence
Data Poll
from System
Verify Data
No
Yes
Last Address
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
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PDF描述 |
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| S71AL016D02BAWBF0 | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWBF2 | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWBF3 | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWTF0 | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWTF2 | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71AL016D02BAWBF0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWBF2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWBF3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWTF0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016D02BAWTF2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
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