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參數(shù)資料
| 型號： | S3032 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(頻率可選的SONET/SDH收發(fā)器（完全集成OC-3/12接口器件）) |
| 中文描述： | TRANSCEIVER, PQFP64 |
| 封裝： | 10 MM, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 151K |
| 代理商： | S3032 |
7
S3032
SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR
August 18, 2000 / Revision F
OTHER OPERATING MODES
Diagnostic Loopback
When the Diagnostic Loopback Enable (DLEB) input
is active, a loopback from the transmitter to the re-
ceiver at the serial data rate can be set up for
diagnostic purposes.
The differential serial output data from the transmitter
is routed to the clock recovery unit and serial-to-par-
allel block in place of the normal Receive Serial Data
(RSD). SDPECL must be High for diagnostic
loopback.
Line Loopback
When Line Loopback Enable (LLEB) is active, a
loopback from the receiver to the transmitter at the
serial data rate can be set up for facility loopback
testing. The recovered clock is used to retime the
incoming data before driving the TSDP/N outputs. In
line loopback mode, the TSCLKP/N outputs will be
driven by the receiver recovered clock.
Serial Loop Timing
In Serial Loop Timing (SLPTIME) mode, the clock
synthesizer PLL of the S3032 is bypassed, and the
timing of the entire transmitter section is controlled
by the recovered receive serial clock. This mode is
entered by using the SLPTIME input.
In this mode the REFCLKP/N input is not used, and
the MODE[1:0] inputs are ignored for all transmit
functions.
Forward Clocking
For both 77.78 MHz and 38.88 MHz reference op-
eration, the S3032 operates in the forward clocking
mode. The PLL locks the PCLK output of the trans-
mitter section to the REFCLK with a fixed and
repeatable phase relation. This allows the transmit-
ter data source to also be the timing source for the
serial clock synthesis. (See Figures 14 and 15.)
The rising edge of PCLK is locked to the rising edge
of REFCLKP, with a maximum delay of 8 to 10 nsec
due to the PCLK TTL output driver.
For operation at 19.44 MHz and 51.84 MHz refer-
ences, seperate timing paths are used for PLL
control and PCLK generation, and forward clocking
is not recommended.
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| S3035 | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(頻率可選，帶片上高頻鎖相環(huán)的SONET/SDH收發(fā)器（完全集成OC-3/12接口器件）) |
| S3037 | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(19.44和77.76 MHz兩種頻率可選的SONET/SDH收發(fā)器) |
| S3038 | SONET/SDH/ATM OC-12 Quad Transceiver(SONET/SDH四收發(fā)器（完全集成OC-12接口器件）) |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
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| S3032A | 制造商:AppliedMicro 功能描述: 制造商:AppliedMicro 功能描述:TRANSCEIVER, PQFP64 |
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| S3033-K310 | 制造商:EnOcean GmbH 功能描述:TCM310C Series 315 Mhz Gateway Transceiver Module For Line-Powered Applications |
| S3033-K320 | 制造商:EnOcean GmbH 功能描述:TCM320C Series 315 Mhz Transceiver Module For Line-Powered Applications |
| S3034-E300 | 制造商:EnOcean GmbH 功能描述:EnOcean Energy Harvesting/Radio Technology 315Mhz Dolphin Starter Kit-NAmerica |
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