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參數(shù)資料
| 型號(hào)： | S3032 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(頻率可選的SONET/SDH收發(fā)器（完全集成OC-3/12接口器件）) |
| 中文描述： | TRANSCEIVER, PQFP64 |
| 封裝： | 10 MM, PLASTIC, QFP-64 |
| 文件頁(yè)數(shù)： | 20/22頁(yè) |
| 文件大?。?/td> | 151K |
| 代理商： | S3032 |
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S3032
SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR
August 18, 2000 / Revision F
RECEIVER FRAMING
Figure 11 shows a typical reframe sequence in
which a byte realignment is made. The frame and
byte boundary detection is enabled by the rising
edge of OOF and remains enabled while OOF is
High. Both boundaries are recognized upon receipt
of the third A2 byte which is the first data byte to be
reported with the correct byte alignment on the out-
going data bus (POUT[7:0]). Concurrently, the frame
pulse is set High for one POCLK cycle.
When interfacing with a section terminating device,
the OOF input remains High for one full frame after
the first frame pulse while the section terminating
device verifies internally that the frame and byte
alignment are correct, as shown in Figure 12. Since
at least one framing pattern has been detected since
the rising edge of OOF, boundary detection is dis-
abled when OOF is set Low.
The frame and byte boundary detection block is acti-
vated by the rising edge of OOF, and stays active
until the first FP pulse or until OOF goes Low, which-
ever occurs last. Figure 11 shows a typical OOF
timing pattern which occurs when the S3032 is con-
nected to a down stream section terminating device.
OOF remains High for one full frame after the first
FP pulse. The frame and byte boundary detection
block is active until OOF goes Low.
Figure 13 shows the frame and byte boundary detec-
tion activation by a rising edge of OOF, and
deactivated by the first FP pulse.
Figure 11. Frame and Byte Detection
1. Range of input to output delay can be 1.5 to 2.5 POCLK cycles.
Figure 12. OOF Operation Timing
BOUNDARY DETECTION ENABLED
OOF
FP
OOF
FP
BOUNDARY DETECTION ENABLED
Figure 13. Alternate OOF Timing
A1
A1
A1
A2
A2
A2
A2
A2
Note 1
A1
A1
A1
A2
A2
A2 (28H)
Invalid Data
Valid
Data
RECOVERED
CLOCK/
REFCLK
OOF
RSD
POUT[7:0]
POCLK
FP
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| S3035 | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(頻率可選，帶片上高頻鎖相環(huán)的SONET/SDH收發(fā)器（完全集成OC-3/12接口器件）) |
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| S3038 | SONET/SDH/ATM OC-12 Quad Transceiver(SONET/SDH四收發(fā)器（完全集成OC-12接口器件）) |
| S3040A | SONET/SDH Clock Recovery Unit(帶片上高頻鎖相環(huán)的SONET/SDH時(shí)鐘恢復(fù)單元) |
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