參數(shù)資料
型號： S29GL128N11FFIVH2
廠商： SPANSION LLC
元件分類： PROM
英文描述： 16M X 16 FLASH 3V PROM, 110 ns, PBGA64
封裝： 10 X 13 MM, 1 MM PITCH, LEAD FREE, FBGA-64
文件頁數(shù)： 68/74頁
文件大?。?/td> 1593K
代理商： S29GL128N11FFIVH2
68
S29GL-N
S29GL-N_01_A0 May 1, 2006
Da ta
Sh e e t
19. Erase And Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 10,000 cycles, checkerboard pattern.
2. Under worst case conditions of 90°C, VCC = 3.0 V, 100,000 cycles.
3. Effective write buffer specification is based upon a 16-word write buffer operation.
4. The typical chip programming time is considerably less than the maximum chip programming time listed, since most words program
faster than the maximum program times listed.
5. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
6. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 11.1
on page 46 and Table 11.3 on page 48 for further information on command definitions.
20. BGA Package Capacitance
Notes
1. Sampled, not 100% tested.
2. Test conditions TA = 25°C, f = 1.0 MHz.
Parameter
Typ
Max
Unit
Comments
Sector Erase Time
0.5
3.5
sec
Excludes 00h programming
prior to erasure (Note 5)
Chip Erase Time
S29GL128N
64
256
sec
S29GL256N
128
512
Total Write Buffer
Programming Time
240
s
Excludes system level
overhead (Note 6)
Total Accelerated Effective
Write Buffer Programming
200
s
Chip Program Time
S29GL128N
123
sec
S29GL256N
246
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
CIN
Input Capacitance
VIN = 0
BGA
4.2
5.0
pF
COUT
Output Capacitance
VOUT = 0
BGA
5.4
6.5
pF
CIN2
Control Pin Capacitance
VIN = 0
BGA
3.9
4.7
pF
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