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參數(shù)資料
| 型號(hào)： | S29GL128N11FFIVH2 |
| 廠(chǎng)商： | SPANSION LLC |
| 元件分類(lèi)： | PROM |
| 英文描述： | 16M X 16 FLASH 3V PROM, 110 ns, PBGA64 |
| 封裝： | 10 X 13 MM, 1 MM PITCH, LEAD FREE, FBGA-64 |
| 文件頁(yè)數(shù)： | 33/74頁(yè) |
| 文件大?。?/td> | 1593K |
| 代理商： | S29GL128N11FFIVH2 |
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May 1, 2006 S29GL-N_01_A0
S29GL-N
37
Data
She e t
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location loaded), DQ6 =
toggle, and DQ5=0. A Write-to-Buffer-Abort Reset command sequence must be written to reset the device for
the next operation.
Write buffer programming is allowed in any sequence. Note that the Secured Silicon sector, autoselect, and
CFI functions are unavailable when a program operation is in progress. This flash device is capable of
handling multiple write buffer programming operations on the same write buffer address range without
intervening erases. For applications requiring incremental bit programming, a modified programming method
is required, please contact your local Spansion representative. Any bit in a write buffer address range
cannot be programmed from 0 back to a 1. Attempting to do so may cause the device to set DQ5 = 1, or
cause the DQ7 and DQ6 status bits to indicate the operation was successful. However, a succeeding read
shows that the data is still 0. Only erase operations can convert a 0 to a 1.
10.5.3
Accelerated Program
The device offers accelerated program operations through the WP#/ACC pin. When the system asserts VHH
on the WP#/ACC pin, the device automatically enters the Unlock Bypass mode. The system may then write
the two-cycle Unlock Bypass program command sequence. The device uses the higher voltage on the WP#/
ACC pin to accelerate the operation. Note that the WP#/ACC pin must not be at VHH for operations other than
accelerated programming, or device damage may result. WP# has an internal pull-up; when unconnected,
WP# is at VIH.
Figure 10.2 on page 39 illustrates the algorithm for the program operation. Refer to Erase and Program
Operations on page 62 for parameters, and Figure 18.4 on page 63 for timing diagrams.
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