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參數(shù)資料
| 型號： | S29GL128N11FAI012 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 110 nm MirrorBit⑩ Process Technology |
| 中文描述： | 8M X 16 FLASH 3V PROM, 110 ns, PBGA64 |
| 封裝： | 13 X 11 MM, FBGA-64 |
| 文件頁數(shù)： | 82/100頁 |
| 文件大?。?/td> | 952K |
| 代理商： | S29GL128N11FAI012 |
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80
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3 October 13, 2006
D a t a S h e e t
AC Characteristics
Erase and Program Operations
Notes:
1.
Not 100% tested.
2.
See the
Erase And Programming Performance on page 87
for more information.
3.
For 1–16 words/1–32 bytes programmed.
4.
Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5.
Unless otherwise indicated, AC specifications for 90 ns, 100 ns, and 110 ns speed options are tested with V
IO
= V
CC
= 3 V. AC specifications
for 110 ns speed options are tested with V
IO
= 1.8 V and V
CC
= 3.0 V.
6.
90 ns speed option only applicable to S29GL128N and S29GL256N.
Parameter
Speed Options
JEDEC
Std.
Description
90
(Note 6)
100
110
110
Unit
t
AVAV
t
WC
Write Cycle Time
(Note 1)
Min
90
100
110
110
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit
polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
45
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
45
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
CEPH
CE# High during toggle bit polling
Min
20
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
35
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes
2
,
3
)
Typ
240
μs
Effective Write Buffer Program
Operation (Notes
2
,
4
)
Per Word
Typ
μs
15
Accelerated Effective Write Buffer
Program Operation (Notes
2
,
4
)
Per Word
Typ
μs
13.5
Program Operation
(Note 2)
Word
Typ
μs
60
Accelerated Programming Operation
(Note 2)
Word
Typ
μs
54
t
WHWH2
t
WHWH2
Sector Erase Operation
(Note 2)
Typ
0.5
sec
t
VHH
V
HH
Rise and Fall Time
(Note 1)
Min
250
ns
t
VCS
V
CC
Setup Time
(Note 1)
Min
50
μs
t
BUSY
Erase/Program Valid to RY/BY# Delay
Max
90
ns
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL128N11FAI020 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 110ns 64-Pin Fortified BGA Tray |
| S29GL128N11FAI023 | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 128M-Bit 16M x 8/8M x 16 110ns 64-Pin Fortified BGA T/R |
| S29GL128N11FAIS30 | 制造商:Spansion 功能描述: |
| S29GL128N11FFA010 | 制造商:Spansion 功能描述: |
| S29GL128N11FFA013 | 制造商:Spansion 功能描述: |
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