
66
S29GL-N MirrorBit Flash Family
S29GL-N_00_B3  October 13, 2006
D a t a  S h e e t
Table 15. Sector Protection Commands (x8)
Command Sequence
( Notes)
Command Set Entry (
5
)
Program (
6
)
Read (
6
)
Command Set Exit (
7
)
Command Set Entry (
5
)
Program (
8
)
C
Bus Cycles ( Notes 
1
–
4
)
3rd/ 10th 
Addr
Data
AAA
40
1st/ 8th
Addr
AAA
XXX
00
XXX
AAA
XXX
00
07
00
05
XX
AAA
XXX
XXX
SA
XXX
AAA
XXX
XXX
XXX
AAA
XXX
XXX
SA
XXX
2nd/ 9th
Addr
555
XXX
4th/ 11th
Addr
5th
6th
7th
Data
AA
A0
Data
90
AA
A0
PWD0
PWD7
25
PWD5
90
AA
A0
80
RD(0)
90
AA
A0
RD(0)
90
AA
A0
A0
RD(0)
90
Data
55
Data
Data
Addr
Data
Addr
Data
Addr
Data
Lock 
Register
Bits
3
2
1
2
3
2
XXX
555
PWAx
01
00
55
Password
Protection
AAA
60
PWDx
PWD1
Read (
9
)
8
02
PWD2
03
PWD3
04
PWD4
05
PWD5
06
PWD6
Unlock (
10
)
11
00
06
XX
555
SA
00
03
00
07
PWD0
PWD7
01
00
PWD1
29
02
PWD2
03
PWD3
04
PWD4
PWD6
00
55
00
30
Command Set Exit (
7
)
Command Set Entry (
5
)
PPB Program (
11
)
All PPB Erase (
11
, 
12
)
PPB Status Read
Command Set Exit (
7)
Command Set Entry (
5
)
PPB Lock Bit Set
PPB Lock Bit Status Read
Command Set Exit (
7
)
Command Set Entry (
5
)
DYB Set
DYB Clear
DYB Status Read
Command Set Exit (
7
)
2
3
2
2
1
2
3
2
1
2
3
2
2
1
2
Non-Volatile 
Sector 
Protection (PPB)
AAA
C0
XXX
555
XXX
00
55
00
Global 
Volatile Sector 
Protection 
Freeze 
(PPB Lock)
AAA
50
XX
555
SA
SA
00
55
00
01
Volatile Sector
Protection 
(DYB)
AAA
E0
XXX
00
Legend:
X =  Don’t care.
RA =  Address of the memory location to be read. 
SA =  Sector Address. Any address that falls within a specified sector. 
See Tables 
2
–
4
 for sector address ranges.
PWA =  Password Address. Address bits A1 and A0 are used to select 
each 16-bit portion of the 64-bit entity.
PWD =  Password Data.
RD(0) =  DQ0 protection indicator bit. If protected, DQ0 =  0. If 
unprotected, DQ0 =  1.
Notes:
1.
2.
3.
All values are in hexadecimal.
Shaded cells indicate read cycles.
Address and data bits not specified in table, legend, or notes are 
don’t cares (each hex digit implies 4 bits of data).
Writing incorrect address and data values or writing them in the 
improper sequence may place the device in an unknown state. 
The system must write the reset command to return the device 
to reading array data.
Entry commands are required to enter a specific mode to enable 
instructions only available within that mode.
4.
5.
6.
No unlock or command cycles required when bank is reading 
array data.
Exit command must be issued to reset the device into read 
mode; device may otherwise be placed in an unknown state.
Entire two bus-cycle sequence must be entered for each portion 
of the password.
Full address range is required for reading password. 
10. Password may be unlocked or read in any order. Unlocking 
requires the full password (all seven cycles).
11. ACC must be at V
IH
 when setting PPB or DYB.
12. “All PPB Erase” command pre-programs all PPBs before erasure 
to prevent over-erasure.
7.
8.
9.