參數資料
型號： S29GL064M90FCIR83
廠商： Spansion Inc.
英文描述： 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
中文描述： 256,128,64,32，3.0兆伏安只頁面模式閃存具有0.23レ米MirrorBit工藝技術
文件頁數： 24/116頁
文件大?。?/td> 1656K
代理商： S29GL064M90FCIR83
22
S29GL-M MirrorBit
TM
Flash Family
S29GL-M_00_B6 October 10, 2006
D a t a S h e e t
Device Bus Operations
This section describes the requirements and use of the device bus operations, which are initiated
through the internal command register. The command register itself does not occupy any addres-
sable memory location. The register is a latch used to store the commands, along with the
address and data information needed to execute the command. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the de-
vice.
Table 5
lists the device bus operations, the inputs and control levels they require, and the
resulting output. The following subsections describe each of these operations in further detail.
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 11.5–12.5
V,
V
HH
= 11.5 V – 12.5
V, X = Don’t Care, SA = Sector Address, A
IN
= Address In,
D
IN
= Data In, D
OUT
= Data Out
Notes:
1.
Addresses are Amax:A0 in word mode; Amax:A-1 in byte mode. Sector addresses are Amax:A15
in both modes.
2.
The sector protect and sector unprotect functions may also be implemented via programming
equipment. See the “Sector Group Protection and Unprotection” section.
3.
If WP# = V
IL
, the first or last sector remains protected (for uniform sector devices), and the two
outer boot sectors are protected (for boot sector devices). If WP# = V
, the first or last sector, or
the two outer boot sectors are protected or unprotected as determined by the method described in
“Sector Group Protection and Unprotection”. All sectors are unprotected when shipped from the
factory (The Secured Silicon Sector may be factory protected depending on version ordered.)
4.
D
or D
OUT
as required by command sequence, data polling, or sector protect algorithm (see
Figure 2
).
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins operate in the byte or word configura-
tion. If the BYTE# pin is set at logic ‘1’, the device is in word configuration, DQ0–DQ15 are active
and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only data I/O pins DQ0–
DQ7 are active and controlled by CE# and OE#. The data I/O pins DQ8–DQ14 are tri-stated, and
the DQ15 pin is used as an input for the LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE# pins to V
IL
. CE# is
the power control and selects the device. OE# is the output control and gates array data to the
output pins. WE# should remain at V
IH
.
Table 5. Device Bus Operations
Operation
CE#
OE
#
W E#
RESET#
W P#
AC
C
Addresses
(
Note 1
)
DQ0–
DQ7
DQ8–DQ15
BYTE#
= V
IH
BY TE#
= V
IL
Read
L
L
H
H
X
X
A
IN
D
OUT
D
OUT
DQ8–DQ14
= High-Z,
DQ15 = A-1
Write (Program/Erase)
L
H
L
H
(
Note 3
)
X
A
IN
(
Note 4
)
(
Note 4
)
Accelerated Program
L
H
L
H
(
Note 3
) V
HH
A
IN
(
Note 4
)
(
Note 4
)
Standby
V
±
0.3 V
X
X
V
±
0.3 V
X
H
X
High-Z
High-Z
High-Z
Output Disable
L
H
H
H
X
X
X
High-Z
High-Z
High-Z
Reset
X
X
X
L
X
X
X
High-Z
High-Z
High-Z
Sector Group Protect
(
Note 2
)
L
H
L
V
ID
H
X
SA, A6 = L,
A3= L, A2= L,
A1= H, A0= L
(
Note 4
)
X
X
Sector Group Unprotect
(
Note 2
)
L
H
L
V
ID
H
X
SA, A6= H,
A3= L, A2= L,
A1= H, A0= L
(
Note 4
)
X
X
Temporary Sector
Group Unprotect
X
X
X
V
ID
H
X
A
IN
(
Note 4
)
(
Note 4
)
High-Z
相關PDF資料
PDF描述
S29GL064M90TAIR32 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR33 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR40 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR42 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
S29GL064M90TAIR43 256,128,64,32,Megabit 3.0 Volt-only Page Mode Flash Memory featuring 0.23 レm MirrorBit Process Technology
相關代理商/技術參數
參數描述
S29GL064M90FFIR2 制造商:Spansion 功能描述:
S29GL064M90TAIR00 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8 90ns 48-Pin TSOP Tray
S29GL064M90TAIR2 制造商:Spansion 功能描述:
S29GL064M90TAIR20 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 56-Pin TSOP Tray
S29GL064M90TAIR3 制造商:Spansion 功能描述:NOR Flash, 4M x 16, 48 Pin, Plastic, TSSOP
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