- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374647 > S2064 (Applied Micro Circuits Corp.) Quad Serial Backplane Device(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | S2064 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Quad Serial Backplane Device(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器) |
| 中文描述： | 四串行背板設(shè)備（用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器） |
| 文件頁數(shù)： | 6/33頁 |
| 文件大小： | 340K |
| 代理商： | S2064 |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁
6
QUAD SERIAL BACKPLANE DEVICE
S2064
October 13, 2000 / Revision G
Table 1. Input Modes
K
C
O
L
N
A
H
C
E
D
O
M
T
n
o
r
e
p
O
0
0
r
d
e
s
)
u
w
K
k
L
C
F
s
d
E
R
.
e
b
E
D
r
O
M
v
c
K
L
e
o
C
F
N
(
E
R
L
.
n
A
n
M
a
R
h
c
O
N
l
e
0
1
k
c
)
w
o
e
k
o
s
d
d
e
s
u
e
b
x
K
r
L
C
v
c
T
.
E
e
o
D
N
O
M
(
O
K
L
C
F
T
L
l
A
M
o
R
O
a
d
N
1
0
.
E
.
D
O
O
F
I
M
F
K
L
l
C
F
E
o
)
R
.
E
d
v
a
D
k
O
c
w
e
M
K
C
o
s
d
O
d
L
e
s
e
b
L
u
E
K
r
N
L
N
C
v
c
A
F
H
E
e
C
R
R
(
a
o
k
1
1
.
E
.
D
O
O
F
I
M
F
A
K
l
o
L
t
C
T
n
a
)
.
E
a
D
d
v
a
O
k
w
M
c
e
k
K
o
s
d
C
o
O
t
L
d
L
s
b
E
u
N
A
r
N
K
v
c
A
L
H
C
e
R
C
T
(
t
e
e
1. Note that internal synchronization of FIFOs is performed upon de-assertion of
RESET.
TRANSMITTER DESCRIPTION
The transmitter section of the S2064 contains a
single PLL which is used to generate the serial rate
transmit clock for all transmitters. Four channels are
provided with a variety of options regarding input
clocking and loopback. The transmitters can operate
in the range of 0.77 GHz to 1.3 GHz, 10 or 20 times
the reference clock frequency.
Data Input
The S2064 has been designed to simplify the paral-
lel interface data transfer and provides the utmost in
flexibility regarding clocking of parallel data. Prior, or
less sophisticated, implementations of this function
have either forced the user to synchronize transmit
data to the reference clock or to provide the output
clock as a reference to the PLL, resulting in in-
creased jitter at the serial interface. The S2064 in-
corporates a unique FIFO structure on both the
parallel inputs and the parallel outputs which en-
ables the user to provide a “clean” reference source
for the PLL and to accept a separate external clock
which is used exclusively to reliably clock data into
the device.
Data is input to each channel of the S2064 nominally
as a 10 bit wide word. This consists of eight data bits
of user data, KGEN, and SOF. An input FIFO and a
clock input, TCLKx, are provided for each channel of
the S2064. The device can operate in two different
modes. In CHANNEL LOCK mode all four bytes of
input data are clocked into their respective FIFOs
using a common clock. The S2064 can be config-
ured to use either the TCLKA (TCLK MODE) input or
the REFCLK input (REFCLK MODE). In NORMAL
mode, each byte of data is clocked into its FIFO with
the TCLKx provided with each byte. Table 1 provides
a summary of the input modes for the S2064.
Operation in the TCLK MODE makes it easier for
users to meet the relatively narrow setup and hold
time window required by the parallel 10-bit interface.
The TCLK signal is used to clock the data into an
internal holding register and the S2064 synchronizes
its internal data flow to insure stable operation. How-
ever, regardless of the clock mode, REFCLK is al-
ways the VCO reference clock. This facilitates the
provision of a clean reference clock resulting in mini-
mum jitter on the serial output. The TCLK must be
frequency locked to REFCLK, but may have an arbi-
trary but fixed phase relationship. Adjustment of in-
ternal timing of the S2064 is performed during reset.
Once synchronized, the S2064 can tolerate up to
±
3ns of phase drift between TCLK and REFCLK.
Figure 6 demonstrates the flexibility afforded by the
S2064. A low jitter reference is qovided directly to
the S2064 at either 1/10 or 1/20 the serial data rate.
This insures minimum jitter in the synthesized clock
used for serial data transmission. A system clock
output at the parallel word rate, TCLKO, is derived
from the PLL and provided to the upstream circuit as
a system clock. The frequency of this output is con-
stant at the parallel word rate, 1/10 the serial data
rate, regardless of whether the reference is provided
at 1/10 or 1/20 the serial data rate. This clock can be
buffered as required without concern about added
delay. There is no phase requirement between
TCLKO and TCLKx, which is provided back to the
S2064, other than that they remain within
±
3ns of
the phase relationship established at reset.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S2065 | Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器) |
| S2066 | Quad GigaBit Ethernet Transceiver(四千兆位以太網(wǎng)收發(fā)器) |
| S2067 | Dual Serial Backplane Transceiver with Dual I/O(帶雙傳送接收串行I/O的雙收發(fā)器) |
| S2068 | Dual GigaBit Ethernet Transceiver(雙千兆位以太網(wǎng)收發(fā)器) |
| S2070 | Fibre Channel and GigaBit Ethernet Transceiver(帶片上鎖相環(huán)的光纖通道/千兆位以太網(wǎng)收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S2065A | 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA |
| S2065J | 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065J | 制造商:Littelfuse 功能描述:Thyristor Thyristor/Triac Type:SCR |
| S2065J_ | 功能描述:SCR - Use 576-S2065J RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065JTP | 功能描述:SCR SCR 200V 65A Iso RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
發(fā)布緊急采購，3分鐘左右您將得到回復。