參數(shù)資料
型號(hào)： S2064
廠商： Applied Micro Circuits Corp.
英文描述： Quad Serial Backplane Device(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器)
中文描述： 四串行背板設(shè)備（用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器）
文件頁(yè)數(shù)： 10/33頁(yè)
文件大?。?/td> 340K
代理商： S2064
10
QUAD SERIAL BACKPLANE DEVICE
S2064
October 13, 2000 / Revision G
k
c
o
L
t
n
e
S
e
r
u
C
y
)
c
n
K
L
e
u
C
q
F
e
E
r
F
R
L
.
.
L
P
v
e
S
k
c
o
L
w
e
N
d
e
k
c
o
L
m
p
p
8
8
4
<
d
e
k
c
o
L
m
p
p
2
3
7
o
8
8
4
d
e
n
m
r
d
n
U
m
p
p
2
3
7
>
d
e
k
c
o
U
d
e
k
c
o
U
m
p
p
4
4
2
<
d
e
k
c
o
L
m
p
p
6
6
3
o
4
4
2
d
e
n
m
r
d
n
U
m
p
p
6
6
3
>
d
e
k
c
o
U
Table 5. Lock to Reference Frequency Criteria
RECEIVER DESCRIPTION
Each receiver channel is designed to implement a
Serial Backplane receiver function through the physi-
cal layer. A block diagram showing the basic func-
tion is provided in Figure 5.
Whenever a signal is present, the receiver attempts
to recover the serial clock from the received data
stream. After acquiring bit synchronization, the
S2064 searches the serial bit stream for the occur-
rence of a K28.5 character on which to perform word
synchronization. Once synchronization on both bit
and word boundaries is achieved, the receiver pro-
vides the decoded data on its parallel outputs.
The S2064 provides the capability to operate with all
four channels locked together (CHANNEL LOCK
mode). Channel lock process and status reporting is
described below.
Data Input
A differential input receiver is provided for each
channel of the S2064. Each channel has a loopback
mode in which the serial data from the transmitter
replaces external serial data. The loopback function
for all four channels is controlled by the loopback
enable signal, LPEN.
The high speed serial inputs to the S2064 are inter-
nally biased to VDD-1.3V. All that is required exter-
nally are AC-coupling and line-to-line differential
termination.
Clock Recovery Function
Clock recovery is performed on the input data
stream for each channel of the S2064. The receiver
PLL has been optimized for the anticipated needs of
Serial Backplane systems. A simple state machine in
the clock recovery macro decides whether to acquire
lock from the serial data input or from the reference
clock. The decision is based upon the frequency and
run length of the serial data inputs. If at any time the
frequency or run length checks are violated, the
state machine forces the VCO to lock to the refer-
ence clock. This allows the VCO to maintain the cor-
rect frequency in the absence of data.
The ‘lock to reference’ frequency criteria insure that
the S2064 will respond to variations in the serial data
input frequency (compared to the reference fre-
quency). The new Lock State is dependent upon the
current lock state, as shown in Table 5.
The run-length criteria insure that the S2064 will re-
spond appropriately and quickly to a loss of signal.
The run-length checker flags a condition of consecu-
tive ones or zeros across 12 parallel words. Thus
119 or less consecutive ones or zeros does not
cause signal loss, 129 or more causes signal loss,
and 120 - 128 may or may not, depending on how
the data aligns across byte boundaries.
If both the off-frequency detect circuitry test and the
run-length test are satisfied, the CRU will attempt to
lock to the incoming data. When lock is achieved,
LOCK-DET is asserted on the ERR, EOF, and
KFLAG status lines. It is possible for the run length
test to be satisfied due to noise on the inputs, even if
no signal is present. In this case the lock detect sta-
tus may periodically assert as the VCO frequency
approaches that of the REFCLK.
In any transfer of PLL control from the serial data to
the reference clock, the RCxP/N outputs remain
phase continuous and glitch free, assuring the integ-
rity of downstream clocking.
When operating in independent mode, all four PLL
lock status is indicated by a 1-0-1 on the ERR, EOF,
and KFLAG outputs, respectively. When operating in
the CHANNEL LOCK mode, PLL locking of all four
channels must be accomplished before byte-skewing
is achieved and “In Sync” status is indicated on the
ERR, EOF, and KFLAG outputs.
Reference Clock Input
A single reference clock, which serves both transmit-
ter and receiver, must be provided from a low jitter
clock source. The frequency of the received data
stream (divided-by-10 or -20) must be within 200
ppm of the reference clock to insure reliable locking
of the receiver PLL.
相關(guān)PDF資料
PDF描述
S2065 Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器)
S2066 Quad GigaBit Ethernet Transceiver(四千兆位以太網(wǎng)收發(fā)器)
S2067 Dual Serial Backplane Transceiver with Dual I/O(帶雙傳送接收串行I/O的雙收發(fā)器)
S2068 Dual GigaBit Ethernet Transceiver(雙千兆位以太網(wǎng)收發(fā)器)
S2070 Fibre Channel and GigaBit Ethernet Transceiver(帶片上鎖相環(huán)的光纖通道/千兆位以太網(wǎng)收發(fā)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S2065A 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA
S2065J 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube
S2065J 制造商:Littelfuse 功能描述:Thyristor Thyristor/Triac Type:SCR
S2065J_ 功能描述:SCR - Use 576-S2065J RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube
S2065JTP 功能描述:SCR SCR 200V 65A Iso RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開(kāi)啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*