- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374647 > S2062 (Applied Micro Circuits Corp.) Dual Serial Backplane Transceiver(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的雙收發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | S2062 |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | Dual Serial Backplane Transceiver(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的雙收發(fā)器) |
| 中文描述： | 雙串行背板收發(fā)器（用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的雙收發(fā)器） |
| 文件頁(yè)數(shù)： | 11/27頁(yè) |
| 文件大?。?/td> | 289K |
| 代理商： | S2062 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)當(dāng)前第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)
11
S2062
DUAL SERIAL BACKPLANE DEVICE
October 13, 2000 / Revision C
e
d
o
M
E
D
O
M
C
q
e
r
F
N
/
P
x
C
R
e
d
o
M
k
c
o
C
f
H
0
0
2
O
C
V
e
d
o
M
k
c
o
C
l
F
1
0
1
O
C
V
Table 8. Output Clock Mode
8B/10B Decoding
After serial to parallel conversion, the S2062 pro-
vides 8B/10B decoding of the data. The received 10-
bit codeword is decoded to recover the original 8-bit
data. The decoder also checks for errors and flags,
either invalid codeword errors or running disparity
errors by assertion of the ERRx signal. Error type is
determined by examining the EOF output in accor-
dance with Table 7. When more than one reportable
condition occurs simultaneously, reporting is in ac-
cordance with the rank assigned by Table 7.
Data Output
Data is output on the DOUT[0:7] outputs. K-characters
are flagged using the KFLAG signal. The EOF (with
KFLAG) is used to indicate the reception of a valid
K28.5 character. Invalid codewords and decoding er-
rors are indicated on the ERR output. KFLAG, EOF,
and ERR are buffered with the data in the FIFO to
insure that all outputs are synchronized at the S2062
outputs. Errors are reported independently for each
channel in TCLK or REFCLK mode operation.
The S2062 TTL outputs are optimized to drive 65
line impedances. Internal source matching provides
good performance on unterminated lines of reason-
able length.
Parallel Output Clock Rate
Two output clock modes are supported, as shown in
Table 8. When CMODE is HIGH, a complementary
TTL clock at the data rate is provided on the RCxP/N
outputs. Data should be clocked on the rising edge
of RCxP. When CMODE is LOW, a complementary
TTL clock at 1/2 the data rate is provided. Data
should be latched on the rising edge of RCxP and
the rising edge of RCxN.
In Fibre Channel and Gigabit Ethernet applications,
multiple consecutive K28.5 characters cannot be
generated. However, for serial backplane applica-
tions this can occur. The S2062 must be able to
operate properly when multiple K28.5 characters are
received. After the first K28.5 is detected and
aligned, the RCxP/N clock will operate without
glitches or loss of cycles.
Figure 8. S2062 Diagnostic Loopback Operation
output
disabled
CRU
CSU
OTHER OPERATING MODES
Operating Frequency Range
The S2062 is designed to operate at serial baud
rates of 0.77 GHz to 1.3 GHz (616 Mbps to 1040
Mbps user data rate). The part is specified at Fibre
Channel (1062 MHz) and Gigabit Ethernet (1.25
GHz) serial baud rates, but will operate satisfactorily
at any rate in this range.
Loopback Mode
When loopback mode is enabled, the serial data
from the transmitter is provided to the serial input of
the receiver, as shown in Figure 8. This provides the
ability to perform system diagnostics and off-line
testing of the interface to verify the integrity of the
serial channel before enabling the transmission me-
dium. Loopback mode can be simultaneously en-
abled for both channels using the loopback-enable
input, LPEN. Note that the high speed outputs are
disabled during loopback operation.
TEST MODES
The RESET pin is used to initialize the Transmit
FIFOs and must be asserted (LOW) prior to entering
the normal operational state (see section Transmit
FIFO Initialization).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S2064 | Quad Serial Backplane Device(用于以太網(wǎng)，光纖通道高速串行數(shù)據(jù)傳送的四收發(fā)器) |
| S2065 | Quad Serial Backplane Device with Dual I/O(帶雙傳送接收串行I/O的四收發(fā)器) |
| S2066 | Quad GigaBit Ethernet Transceiver(四千兆位以太網(wǎng)收發(fā)器) |
| S2067 | Dual Serial Backplane Transceiver with Dual I/O(帶雙傳送接收串行I/O的雙收發(fā)器) |
| S2068 | Dual GigaBit Ethernet Transceiver(雙千兆位以太網(wǎng)收發(fā)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S2062TB | 制造商:AppliedMicro 功能描述:Backplane Transceiver 156-Pin TBGA |
| S2065A | 制造商:AppliedMicro 功能描述:Backplane Transceiver 208-Pin TBGA |
| S2065J | 功能描述:SCR 65A 200V RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
| S2065J | 制造商:Littelfuse 功能描述:Thyristor Thyristor/Triac Type:SCR |
| S2065J_ | 功能描述:SCR - Use 576-S2065J RoHS:否 制造商:STMicroelectronics 最大轉(zhuǎn)折電流 IBO:480 A 額定重復(fù)關(guān)閉狀態(tài)電壓 VDRM:600 V 關(guān)閉狀態(tài)漏泄電流（在 VDRM IDRM 下）:5 uA 開啟狀態(tài) RMS 電流 (It RMS): 正向電壓下降:1.6 V 柵觸發(fā)電壓 (Vgt):1.3 V 最大柵極峰值反向電壓:5 V 柵觸發(fā)電流 (Igt):35 mA 保持電流（Ih 最大值）:75 mA 安裝風(fēng)格:Through Hole 封裝 / 箱體:TO-220 封裝:Tube |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。