- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98068 > S1C63653F 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 PDF資料下載
參數(shù)資料
| 型號(hào)： | S1C63653F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100 |
| 封裝： | CERAMIC, QFP15-100 |
| 文件頁(yè)數(shù)： | 93/121頁(yè) |
| 文件大小： | 1127K |
| 代理商： | S1C63653F |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)當(dāng)前第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)
S1C63653 TECHNICAL MANUAL
EPSON
65
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
4.10.3 Setting the input clock
A prescaler is provided for each timer. The prescaler generates the input clock for the timer by dividing
the source clock supplied from the OSC1 or OSC3 oscillation circuit.
The source clock (OSC1 or OSC3) and the division ratio of the prescaler can be selected with software for
each timer individually.
The input clock is set in the following sequence.
Selection of source clock
Select the source clock input to each prescaler from either OSC1 or OSC3. This selection is done using
the source clock selection register CKSELx; when "0" is written to the register, OSC1 is selected and
when "1" is written, OSC3 is selected.
When the OSC3 oscillation clock is selected for the clock source, it is necessary to turn the OSC3
oscillation on, prior to using the programmable timer. However the OSC3 oscillation circuit requires a
time at least 5 msec from turning the circuit on until the oscillation stabilizes. Therefore, allow an
adequate interval from turning the OSC3 oscillation circuit on to starting the programmable timer.
Refer to Section 4.4, "Oscillation Circuit", for the control and notes of the OSC3 oscillation circuit.
At initial reset, the OSC3 oscillation circuit is set in off state.
Selection of prescaler division ratio
Select the division ratio for each prescaler from among 4 types. This selection is done using the
prescaler division ratio selection register PTPSx0/PTPSx1. Table 4.10.3.1 shows the correspondence
between the setting value and the division ratio.
Table 4.10.3.1 Selection of prescaler division ratio
PTPSx1
1
0
PTPSx0
1
0
1
0
Prescaler division ratio
Source clock / 256
Source clock / 32
Source clock / 4
Source clock / 1
By writing "1" to the PTRUNx register, the prescaler inputs the source clock and outputs the clock
divided by the selected division ratio. The counter starts counting down by inputting the clock.
4.10.4 Event counter mode (timer 0)
Timer 0 has an event counter function that counts an external clock input to the input port K13. This
function is selected by writing "1" to timer 0 counter mode selection register EVCNT. At initial reset,
EVCNT is set to "0" and timer 0 is configured as a normal timer that counts the internal clock.
In the event counter mode, the clock is supplied to timer 0 from outside the IC, therefore, the settings of
the timer 0 prescaler division ratio selection register PTPS00–PTPS01 and the settings of the timer 0
source clock selection register CKSEL0 become invalid.
Count down timing can be selected from either the falling or rising edge of the input clock using the
timer 0 pulse polarity selection register PLPOL. When "0" is written to the PLPOL register, the falling
edge is selected, and when "1" is written, the rising edge is selected. The count down timing is shown in
Figure 4.10.4.1.
K13 input
Count data
n
n-1
n-2
n-3
n-4
n-5
n-6
PLPOL
EVCNT
01
1
PTRUN0
Fig. 4.10.4.1 Timing chart in event counter mode
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S1C6F567D0A0100 | MICROCONTROLLER, UUC141 |
| S1C6N3B0D0A0100 | MICROCONTROLLER, UUC54 |
| S1C6P366D0A0100 | 4-BIT, FLASH, 4.1 MHz, MICROCONTROLLER, UUC102 |
| S1C6P466D0A0A00 | MICROCONTROLLER, UUC140 |
| S1C6S2L7D | 4-BIT, MROM, 0.032 MHz, MICROCONTROLLER, UUC58 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1C63656 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63657 | 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller |
| S1C63658 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63666 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C63709 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。