參數(shù)資料
型號： S1C63653F
元件分類： 微控制器/微處理器
英文描述： 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100
封裝： CERAMIC, QFP15-100
文件頁數(shù)： 49/121頁
文件大?。?/td> 1127K
代理商： S1C63653F
S1C63653 TECHNICAL MANUAL
EPSON
25
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Power Control)
Switching to high-speed operation
The S1C63653 is designed with twin clock specifications; it has two types of oscillation circuits OSC1
(for low-speed operation) and OSC3 (for high-speed operation) built-in. Use OSC1 clock for normal
operation, and switch it to OSC3 using software when high-speed operation is necessary. When
switching the clock, the operating voltage VD1 must be switched using software to stabilize the
operation of the oscillation circuit and internal circuits.
The following shows the switching procedure. Refer to Section 4.4, "Oscillation Circuit", for control of
the oscillation circuit.
Switching from low-speed operation to high-speed operation
1. Set VDC2 to "0". (low-speed operation voltage regulator: halver mode
→ normal mode)
2. Set VDC1 to "1". (high-speed operation voltage regulator: off
→ on)
3. Set VDC0 to "1". (internal logic operating voltage: VD1L
→ VD3)
4. Wait 2.5 msec or more.
5. Set OSCC to "1". (OSC3 oscillation: off
→ on)
6. Wait 5 msec or more.
7. Set CLKCHG to "1". (CPU clock: OSC1
→ OSC3)
To switch from high-speed operation to low-speed operation, follow the procedure to set the halver
mode (see the previous page).
4.2.3 I/O memory for power control
Table 4.2.3.1 shows the I/O address and the control bits for power control.
Table 4.2.3.1 Power control bits
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FF00H
VDC3
VDC2
VDC1
VDC0
R/W
VDC3
VDC2
VDC1
VDC0
0
1/2VDD
On
VD3
VDD
Off
VD1L
LCD system voltage regulator power source switch
Low-speed operation voltage regulator power source switch
High-speed operation voltage regulator on/off
Logic system power source switch
FF60H
LDUTY1 LDUTY0 STCD
LPWR
R/W
LDUTY1
LDUTY0
STCD
LPWR
0
Static
On
Dynamic
Off
LCD drive duty
switch
LCD drive switch
LCD power On/Off
0
1/4
1
1/5
2
1/6
3
1/3
[LDUTY1, 0]
Duty
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
VDC0: Internal logic system power switching register (FF00HD0)
It is used to switch the operating voltage for the CPU and internal circuit.
When "1" is written: VD3
(for OSC3 operation)
When "0" is written: VD1L
(for OSC1 operation)
Reading: Valid
When "1" is written to VDC0, the internal operating voltage is switched to VD3. After switching to VD3,
the OSC3 oscillation can be started.
When the low-speed operation voltage regulator is in the halver mode, return it to the normal mode
before switching to VD3.
When "0" is written to VDC0, the internal operating voltage is switched to VD1L. Stop the OSC3 oscillation
before switching to VD1L.
At initial reset, this register is set to "0".
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