參數(shù)資料
型號(hào)： RTL8208
廠(chǎng)商： Electronic Theatre Controls, Inc.
英文描述： REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER
中文描述： 瑞昱單芯片八路10/100 Mbps快速以太網(wǎng)收發(fā)器
文件頁(yè)數(shù)： 26/40頁(yè)
文件大小： 546K
代理商： RTL8208
RTL8208
2001/01/07
26
Rev.1.923
Receive Path
Receive data and control information are signaled in 10-bit segments. SYNC signal is used to delimit the 10-bit segments. MAC
is responsible to generate these SYNC pulses every ten clocks. For 100Mbps mode, each segment represents a byte of data.
However, for 10Mbps mode, each segment is repeated ten times to represent a byte of data. The receive sequence contains all of
the information defined on the standard MII receive path.
RXD0
RXD1
RXD2
RXD3
RXD4
RXD5
RXD6
RXER from
previous
frame
Speed
0 =10Mbps
1 =100Mbps
Duplex
0 = Half
1 = Full
Link
0 = Down
1 = Up
Jabber
0 = OK
1 = Detected
Upper Nibble
0 = Invalid
1 = Valid
False Carrier
0 = OK
1 = Detected
One Data Byte (Two MII Data Nibbles)
CRS
1
X
1
RXD7
RX_DV
X
0
SMII Reception Encoding
REFCLK
RXD[0]
SYNC
1 2 3 4 5 6 7 8 9 10
CRS
RXDV
RXD0
RXD7
RXD6
RXD5
RXD4
RXD3
RXD2
RXD1
SMII Reception
Transmit Path
Transmit data and control information are signaled in 10-bit segments. SYNC signal is used to delimit the 10-bit segments. MAC
is responsible to generate these SYNC pulses every ten clocks. For 100Mbps mode, each segment represents a byte of data.
However, for 10Mbps mode, each segment is repeated ten times to represent a byte of data.
X
X
X
TXD0
TXD1
TXD2
TXD3
TXD4
TXD5
TXD6
TXD7
TXEN
TXER
One Data Byte (Two MII Data Nibbles)
X
X
X
X
X
0
X
X
X
1
SMII Transmission Encoding
REFCLK
SYNC
TX_ER
TX_EN
TXD0
TXD7
TXD6
TXD5
TXD4
TXD3
TXD2
TXD1
1 2 3 4 5 6 7 8 9 10
SMII Transmission
Collision Detection
The RTL8208 does not indicate that a collision has occurred. It is left up to the MAC to detect the assertion of both CRS_DV and
TX_EN.
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