參數(shù)資料
型號(hào)： RTL8208
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER
中文描述： 瑞昱單芯片八路10/100 Mbps快速以太網(wǎng)收發(fā)器
文件頁(yè)數(shù)： 12/40頁(yè)
文件大?。?/td> 546K
代理商： RTL8208
6. Register Descriptions
RTL8208
2001/01/07
12
Rev.1.923
The first six registers of the MII are defined by the MII specification. Other registers are defined by Realtek Semiconductor Corp.
for internal use and are reserved for specific uses.
Register
Description
0
Control Register
1
Status Register
2
PHY Identifier 1 Register
3
PHY Identifier 2 Register
4
Auto-Negotiation Advertisement Register
5
Auto-Negotiation Link Partner Ability Register
6
Auto-Negotiation Expansion Register
RO: Read Only
RW: Read/Write
LL: Latch Low until cleared
LH: Latch High until cleared
SC: Self Clearing
6.1 Register 0: Control
Default
3100
0F49
001C
C883
05E1
0001
0000
Reg. bit
0.15
0.14
Name
Reset
Loopback
Description
1=PHY reset. This bit is self-clearing.
This will loopback TXD to RXD and ignore all the activities
on the cable media. Valid only for 10Base-T.
1=Enable loopback.
0=Normal operation.
When Nway is enabled, this bit reflects the result of
Auto-negotiation. (Read only)
When Nway is disabled, this bit can be set by SMI*.
(Read/Write)
When 100FX is enabled, this bit =1 (Read only)
1=100Mbps.
0=10Mbps.
This bit can be set through SMI.(Read/Write)
When 100FX is enabled, this bit =0 (Read only)
1 = Enable Auto-negotiation process.
0 = disable Auto-negotiation process.
1=Power down. All functions will be disabled except
SMI.read/write function.
0=Normal operation.
1 = Electrically isolate the PHY from RMII/SMII/SS-SMII.
PHY is still able to respond to MDC/MDIO.
0 = Normal operation
1=Restart Auto-Negotiation process.
0=Normal operation.
When Nway is enabled, this bit reflects the result of
Auto-negotiation. (Read only)
When Nway is disabled, this bit can be set by SMI*.
(Read/Write)
When 100FX is enabled, this bit is determined by the
FX_DUPLEX pin. (Read/Write)
1=Full duplex operation.
0=Half duplex operation.
Mode
RW/SC
RW
Default
0
0
0.13
Spd_Sel
RW
1
0.12
Auto Negotiation
Enable
RW
1
or
0 for 100FX
0.11
Power Down
RW
0
0.10
Isolate
RW
0
0.9
Restart Auto
Negotiation
Duplex Mode
RW/SC
0
0.8
RW
1
0.[7:0]
*SMI: Serial Management Interface , which is composed of MDC,MDIO, allows MAC to manage PHY.
Reserved
0
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