參數(shù)資料
型號(hào)： RTL8208
廠商： Electronic Theatre Controls, Inc.
英文描述： REALTEK SINGLE CHIP OCTAL 10/100 MBPS FAST ETHERNET TRANSCEIVER
中文描述： 瑞昱單芯片八路10/100 Mbps快速以太網(wǎng)收發(fā)器
文件頁數(shù)： 20/40頁
文件大?。?/td> 546K
代理商： RTL8208
RTL8208
2001/01/07
20
Rev.1.923
7.1.3 PHY Address
Each transceiver in the RTL8208 will have a unique PHY address for MII management. The address will be set through the PHY
address pins. The pins are latched at the trailing end of a reset. Transceiver 1 will have the address AA000, where AA=PHYAD
[4:3]. Each internal PHY address is AA000, AA001, AA010, AA011, AA100, AA101, AA110, AA111. Every time an SMI
write or read operation is executed, the transceiver compares the PHY address with its own PHY address definition, and the
operation is executed only when the addresses match.
7.1.4 Auto-Negotiation
For 100/10 TP port, the RTL8208 default setup is Auto-Negotiation enabled. Setting Register 0.12=0 by an SMI write can
disable Auto-Negotiation. For a 100FX port, Auto-Negotiation is always disabled.
For an Auto-Negotiation enabled port, the RTL8208 will negotiate with its link partner to determine the speed and duplex status.
The RTL8208’s ability is advertised in Register 4, and , after Auto-Negotiation is finished, the link partner’s ability will be
stored in Register 5.
If the link partner is Auto-Negotiation disabled, the RTL8208 enters a parallel-detection state to identify the speed of the link
partner. The RTL8208 will link in the same speed as link partner, but in half duplex mode.
Auto-Negotiation is also used to determine Full-duplex flow control. flow control ability is advertised in Register 4.10. The link
partner’s flow control ability is stored in Register 5.10. See the following section for more information.
7.1.5 Full-Duplex Flow Control
If hardware pin TP_pause or 100FX_pause are enabled at power-on reset, Register 5.10=1 and Register 4.10=1. Therefore, after
reset is completed:
When Auto-Negotiation is enabled, Register 4.10 may be overwritten by the MAC, and Register 5.10 may be updated after
N-Way has completed and, Register 5.10 is set as read only for the MAC.
When Auto-Negotiation is disabled, Register 5.10 is set to R/W for the MAC through the SMI interface. If the SMI does not
write to Register 5.10, it is still Register 5.10=1, which means hardware forced flow control is enabled.
7.2 Initialization and Setup
7.2.1 Reset
The RTL8208 is initialized while in a reset state. During reset, each transceiver will be reset simultaneously. There are 3 ways to
reset the RTL8208: Power-on auto reset; hardware pin reset; and software reset. The internal power-on auto reset circuit can reset
the chip while the reset pin (pin47) is floating. The hardware reset signal must be asserted to pin 47, RESET#, low for at least
100ms. A software reset is implemented by writing Register 0.15=1, which is self clearing.
7.2.2 Setup and configuration
The operational modes of the RTL8208 can be configured either by hardware pin (pulled high or low) upon reset or by software
programming via accessing the RTL8208 registers through the SMI. Refer to the pin and register description sections.
7.3 10Base-T
7.3.1 Transmit Function
When TX_EN is active, TXD from RMII/SMII/SS-SMII is serialized, Manchester-encoded, and driven into the network
medium as a packet stream. An on-chip filtering and wave shaping circuit eliminates the need for external filtering. The transmit
function is disabled when the link has failed or when Auto-negotiation proceeds.
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