參數(shù)資料
型號: R5F212ACSDFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
封裝: 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù): 32/138頁
文件大?。?/td> 492K
代理商: R5F212ACSDFP
214
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
19.3.3
Manchester encoding
Manchester encoding (also know as Biphase Code) is a synchronous clock encoding technique
used to encode the clock and data of a synchronous bit stream. In this technique, the actual
binary data to be transmitted are not sent as a sequence of logic 1's and 0's as in level encoded
way as in standard USART (known technically as Non Return to Zero (NRZ)). Instead, the bits
are translated into a slightly different format that has a number of advantages over using straight
binary encoding (i.e. NRZ).
Manchester encoding follows the rules:
If the original data is a Logic 1, the Manchester code is: 0 to 1 (upward transition at bit
center)
If the original data is a Logic 0, the Manchester code is: 1 to 0 (downward transition at bit
center)
Figure 19-2. Manchester Bi-phase levels
19.3.3.1
Manchester frame
The USART supports Manchester encoded frames with the following characteristics:
One start bit Manchester encoded (logical ‘1’)
5, 6, 7, 8, 9, 13, 14,15,16,17 data bits in transmission or reception (MSB or LSB first)
The number of data bit in a frame is independently configurable in reception and
transmission mode.
One or Two stop bits (level encoded)
Figure 19-3. Manchester Frame example
Logical 0
Logical 1
1
0
1
0
1
0
1
0
1
0
1
0
Start
Bit
Data Bits
(up to 17 data bit)
Stop
Bits
Encoder Clock
Manchester Data
Binary Data
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