參數(shù)資料
型號： R5F212ACSDFP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48
封裝： 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-48
文件頁數(shù)： 23/138頁
文件大?。?/td> 492K
代理商： R5F212ACSDFP
206
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
when the Transmit Shift Register and Transmit Buffer Register do not contain data to be trans-
mitted. When disabled, the Transmitter will no longer override the TxDn port.
This bit is available for both USART and EUSART mode.
Bit 2 – UCSZ2: Character Size
The UCSZ2 bits combined with the UCSZ1:0 bit in UCSRC sets the number of data bits (Char-
acter SiZe) in a frame the Receiver and Transmitter use.
This bit have no effect when the EUSART mode is enabled.
Bit 1 – RXB8: Receive Data Bit 8
RXB8 is the ninth data bit of the received character when operating with serial frames with nine
data bits. Must be read before reading the low bits from UDR.
When the EUSART mode is enable and configured in 17 bits receive mode, this bit contains the
seventeenth bit (see EUSART section).
Bit 0 – TXB8: Transmit Data Bit 8
TXB8 is the ninth data bit in the character to be transmitted when operating with serial frames
with nine data bits. Must be written before writing the low bits to UDR.
When the EUSART mode is enable and configured in 17 bits transmit mode, this bit contains the
seventeenth bit (See EUSART section).
18.10.4
USART Control and Status Register C – UCSRC
Bit 7 – Reserved Bit
This bit is reserved for future use. For compatibilty with future devices, this bit must be written to
zero when USCRC is written.
Bit 6 – UMSEL: USART Mode Select
This bit selects between asynchronous and synchronous mode of operation.
When configured in EUSART mode, the synchronous mode should not be set with Manchester
mode (See EUSART section).
Bit 5:4 – UPM1:0: Parity Mode
These bits enable and set type of parity generation and check. If enabled, the Transmitter will
automatically generate and send the parity of the transmitted data bits within each frame. The
Receiver will generate a parity value for the incoming data and compare it to the UPM setting. If
a mismatch is detected, the UPE Flag in UCSRA will be set.
Bit
76543210
-
UMSEL0
UPM1
UPM0
USBS
UCSZ1
UCSZ0
UCPOL
UCSRC
Read/Write
R/W
Initial Value
00000110
Table 18-4.
UMSEL Bit Settings
UMSEL
Mode
0
Asynchronous Operation
1
Synchronous Operation
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
R5F212ACSDFP#U0 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT R8C2A 64LQFP
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