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Data Sheet
1-16
04.2000
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Automatic generation of VC-AIS cells for all VCCs of a VPC at the endpoint including
automatic backward emission of VP-RDI cells
Automatic generation of VP/VC-CC cells to detect ATM layer failures
Optional internal CC function for switch test (proprietary)
Programmable guard times and cell insertion intervals
Support of CC activation/deactivation cells
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Automatic loop of cells for all connections with LB ID inversion
Programmable Port ID for on the fly comparison with Location ID or Source ID of LB cells
Insertion/extraction of LB cells via microprocessor
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128 simultaneous PM generation/ evaluation processors shared for up- and downstream
direction
Full HW evaluation of FM cells and generation of BR cells
Full HW support of data collection according to Bellcore GR-1248 for 128 connections
Support of PM activation/deactivation cells
Support of simultaneous PM flows of F4 and F5 level
Support of adjacent PM segments in one PXB 4340 AOP
128 PM data collection processors shared for up- and downstream direction
Collection of the following data:
– Severely errored cell blocks
– Errored cells
– Lost high priority cells (CLP0)
– Total lost cells (CLP0+1)
– Transmitted high priority cells (CLP0)
– Total transmitted cells (CLP0+1)
– Misinserted cells
– Impaired blocks
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Intel 386EX microprocessor Interface
Low external processing power required
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0.35 μ CMOS, 3.3V
Plastic BGA-352 package
Extended temperature range from -40°C to +85°C
Power dissipation 2.2 W
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Combined Monitoring and Reporting OAM cells for performance monitoring
Time stamp in Forward Monitoring OAM cells
Defect type and defect location fields in AIS/RDI cells
Segment AIS/RDI
Simultaneous generation of end-to-end and segment FM cells