參數(shù)資料
型號： PXASCC
廠商： NXP Semiconductors N.V.
英文描述： CMOS 16-bit communications microcontroller(CMOS 16位通信微控制器)
中文描述： 的CMOS 16位微控制器通信的CMOS（16位通信微控制器）
文件頁數(shù)： 11/42頁
文件大小： 229K
代理商： PXASCC
Philips Semiconductors
Preliminary specification
XA-SCC
CMOS 16-bit communications microcontroller
1999 Mar 29
11
Table 2. Memory Mapped Registers
MMR Name
Read/Write or
Read Only
Size
Address
Offset
Description
Reset
Value
SCCO Registers
8
8
8
8
8
8
8
SCC0 Write Register 0
SCC0 Write Register 1
SCC0 Write Register 2
SCC0 Write Register 3
SCC0 Write Register 4
SCC0 Write Register 5
SCC0 Write Register 6
R/W
R/W
R/W
R/W
R/W
R/W
R/W
800h
802h
804h
806h
808h
80Ah
80Ch
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx misc. parameters & mode
Tx. parameter and control
Sync character or SDLC address field or Match
Character 0
Sync character or SDLC flag or Match Character 1
Transmit Data Buffer
Master Interrupt control
Misc. Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
Upper Byte of Baud rate time constant
Misc. Control bits
External/Status interrupt control
Match Character 2 (WR16)
Match Character 3 (WR17)
Tx/Rx buffer and external status
Receive condition status/residue code
00h
xx
xx
00h
00h
00h
00h
SCC0 Write Register 7
SCC0 Write Register 8
SCC0 Write Register 9
SCC0 Write Register 10
SCC0 Write Register 11
SCC0 Write Register 12
SCC0 Write Register 13
SCC0 Write Register 14
SCC0 Write Register 15
SCC0 Write Register 16
SCC0 Write Register 17
SCC0 Read Register 0
SCC0 Read Register 1
Reserved—do not write
SCC0 Read Register 3
see WR16 and 17
SCC0 Read Register 6
SCC0 Read Register 7
SCC0 Read Register 8
Reserved
SCC0 Read Register 10
Reserved
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
8
8
8
8
8
8
8
8
8
8
8
8
8
80Eh
810h
812h
814h
816h
818h
81Ah
81Ch
81Eh
828h
82Ah
820h
822h
824h
826h
828–82Ah
82Ch
82Eh
830h
832h
834h
836–83Eh
xx
xx
xx
00h
xx
00h
00h
xx
f8h
00h
00h
—
—
—
—
—
—
—
—
—
—
—
RO
8
Interrupt Pending Bits
see WR16 and WR17 above
SDLC byte count low register
SDLC byte count high & FIFO status
Receive Buffer
RO
RO
RO
8
8
8
RO
8
Loop/clock status
SCC1 Registers
8
8
8
8
8
8
8
SCC1 Write Register 0
SCC1 Write Register 1
SCC1 Write Register 2
SCC1 Write Register 3
SCC1 Write Register 4
SCC1 Write Register 5
SCC1 Write Register 6
R/W
R/W
R/W
R/W
R/W
R/W
R/W
840h
842h
844h
846h
848h
84Ah
84Ch
Command register
Tx/Rx Interrupt & data transfer mode
Extended Features Control
Receive Parameter and Control
Tx/Rx misc. parameters & mode
Tx. parameter and control
Sync character or SDLC address field or Match
Character 0
Sync character or SDLC flag or Match Character 1
Transmit Data Buffer
Master Interrupt control
Misc. Tx/Rx control register
Clock Mode Control
Lower Byte of Baud rate time constant
00h
xx
xx
00h
00h
00h
00h
SCC1 Write Register 7
SCC1 Write Register 8
SCC1 Write Register 9
SCC1 Write Register 10
SCC1 Write Register 11
SCC1 Write Register 12
R/W
R/W
R/W
R/W
R/W
R/W
8
8
8
8
8
8
84Eh
850h
852h
854h
856h
858h
xx
xx
xx
00h
xx
00h
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