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參數(shù)資料
| 型號(hào)： | PXA250 |
| 廠商： | Intel Corp. |
| 英文描述： | Intel-R PXA250 and PXA210 Applications Processors |
| 中文描述： | 英特爾- R的PXA250和PXA210應(yīng)用處理器 |
| 文件頁數(shù)： | 35/46頁 |
| 文件大?。?/td> | 431K |
| 代理商： | PXA250 |
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Electrical, Mechanical, and Thermal Specification
—
PXA250 and PXA210
Datasheet
35
4.6
Reset and Power AC Timing Specifications
The applications processor asserts the nRESET_OUT pin in one of several different modes:
Power On
Hardware Reset
Watchdog Reset
GPIO Reset
Sleep Mode
The following sections give the timing and specifications for the entry and exit of these modes.
4.6.1
Power On Timing
The External Voltage Regulator and other power-on devices must provide the applications
processor with a specific sequence of power and resets to ensure proper operation. This sequence is
shown in Figure 4,
“
Power-On Reset Timing
”
on page 36, and detailed in Table 13,
“
Power-On
Timing Specifications
”
on page 36.
On the applications processor, it is important that the power supplies be powered-up in a certain
order to avoid high current situations. The required order is:
1. BATT_VCC
2. VCCQ
3. VCCN
4. VCC and PLL_VCC
The supply in step 3 may be powered at the same time as those in step 2, however, VCCN should
not be powered before VCCQ.
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