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參數(shù)資料
| 型號： | PPC405EX-NpAfffTx |
| 廠商： | Applied Micro Circuits Corp. |
| 英文描述： | PowerPC 405EX Embedded Processor |
| 中文描述： | 嵌入式處理器的PowerPC 405EX |
| 文件頁數(shù)： | 65/67頁 |
| 文件大小： | 457K |
| 代理商： | PPC405EX-NPAFFFTX |
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PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
AMCC Proprietary
65
Preliminary Data Sheet
Initialization
The following describes the method by which initial chip settings are established when a system reset occurs.
Strapping
When the SysReset input is driven low (system reset), the state of certain I/O pins is read in order to enable default
initial conditions before PPC405EX start-up. The actual instant of capture is the nearest system clock edge before
the deassertion of reset. These pins must be strapped using external pull-up (logical 1) or pull-down (logical 0)
resistors to select the desired default conditions. The recommended pull-up is 3k
Ω
to +3.3V, or 10k
Ω
to +5V. The
recommended pull-down is 1K
Ω
to GND. These pins are only used for strap functions during reset. They are used
for other signals during normal operation. The following table lists the strapping pins along with their functions and
strapping options. The signal names assigned to the pins for normal operation appear below the pin number.
Table 25. Strapping Pin Assignments
Pin Strapping
F02
(UART0DSR)
0
0
1
1
0
0
1
1
Initialization Source
Option
F04
(UART0DCD)
0
0
0
0
1
1
1
1
G02
(UART0CTS)
0
1
0
1
0
1
0
1
EBC 8-bit wide ROM
EBC 16-bit wide ROM
EBC 16-bit wide ROM
EBC 8-bit wide NAND Flash
EBC 8-bit wide NAND Flash
IIC ROM at address 0xA8
EBC 8-bit wide ROM
IIC ROM at address 0xA4
Note:
See the
PPC405EX Embedded Processor User’s Manual
for option descriptions and other details regarding the boot process.
A
B
C
D
E
G
F
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PPC405EX-SpAfffTx | PowerPC 405EX Embedded Processor |
| PPC405EZ-CSAfffTx | PowerPC 405EZ Embedded Processor |
| PPC405GP-3BE133C | Power PC 405GP Embedded Processor |
| PPC405GP-3KE133C | Power PC 405GP Embedded Processor |
| PPC405GP-3KE133CZ | Power PC 405GP Embedded Processor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PPC405EX-NPD400T | 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 600 MHZ, 2 PCIE, 2 10/100/1G ETHE - Trays |
| PPC405EX-NPD533T | 制造商:AMCC 功能描述:32 BIT POWERPC CORE, UP TO 600 MHZ, 2 PCIE, 2 10/100/1G ETHE - Trays |
| PPC405EX-NPD600T | 制造商:AppliedMicro 功能描述:POWER ARCHITECTURE 405EP PROCESSOR USED FOR GENERAL NETWORKING 制造商:AMCC 功能描述:32 BIT POWERPC CORE, UP TO 600 MHZ, 2 PCIE, 2 10/100/1G ETHE - Trays |
| PPC405EX-NSA333T | 制造商:AppliedMicro 功能描述:32 BIT POWERPC CORE, UP TO 533 MHZ, 2 PCIE, 2 10/100/1G ETHE - Trays |
| PPC405EX-NSA400T | 制造商:AMCC 功能描述:32 BIT POWERPC CORE, UP TO 533 MHZ, 2 PCIE, 2 10/100/1G ETHE - Trays 制造商:AMCC 功能描述:AMCPPC405EX-NSA400T PCIE*2 WITHOUT ENGIN |
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