參數(shù)資料
型號(hào)： PPC405EX-NpAfffTx
廠商： Applied Micro Circuits Corp.
英文描述： PowerPC 405EX Embedded Processor
中文描述： 嵌入式處理器的PowerPC 405EX
文件頁(yè)數(shù)： 47/67頁(yè)
文件大?。?/td> 457K
代理商： PPC405EX-NPAFFFTX
PPC405EX – PowerPC 405EX Embedded Processor
Revision 1.09 - August 21, 2007
AMCC Proprietary
47
Preliminary Data Sheet
Table 9. Recommended DC Operating Conditions (Sheet 1 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Notes
Logic Supply Voltage
V
DD
+1.1
+1.2
+1.3
V
I/O Supply Voltage
OV
DD
+3.15
+3.3
+3.45
V
SDRAM DDR1(2) Supply Voltage
SV
DD
+2.4 (+1.7)
+2.5 (+1.8)
+2.6 (+1.9)
V
CMOS Supply Voltage
EOV
DD
+2.4
+2.5
+2.6
V
PLL Analog Supply Voltage
AHV
DD
SAV
DD
EAV
DD
+2.4
+2.5
+2.6
V
Analog Supply Voltage
AV
DD
+1.1
+1.2
+1.2
V
I/O Input Low (3.3V LVTTL)
V
IL
0
+0.8
V
I/O Input High (3.3V LVTTL)
V
IH
+2.0
+3.6
V
I/O Output Low (3.3V LVTTL)
V
OL
0
+0.4
V
I/O Output High (3.3V LVTTL)
V
OH
+2.4
+3.6
V
I/O Input Low (3.3V tol, 2.5V CMOS)
V
IL
0
+0.7
V
I/O Input High (3.3V tol, 2.5V CMOS)
V
IH
+1.7
+3.6
V
I/O Output Low (3.3V tol, 2.5V CMOS)
V
OL
0
+0.4
V
I/O Output High (3.3V tol, 2.5V CMOS)
V
OH
+2.0
+2.7
V
I/O Input Low DDR1 (DDR2) (SSTL2)
V
IL
0.3
S
VREF
0.18
(0.125)
V
I/O Input High DDR1 (DDR2) (SSTL2)
V
IH
S
VREF
+ 0.18
(0.125)
SV
DD
+ 0.3
V
I/O Output Low DDR1 (DDR2) (SSTL2)
V
OL
See JESD8-9 (JESD8-15A) standard.
V
I/O Output High DDR1 (DDR2) (SSTL2)
V
OH
See JESD8-9 (JESD8-15A) standard.
V
I/O Input Common-Mode
V
ICM
0
V
DD
V
I/O Input Low (LVDS)
V
IL
0.3
V
ICM
0.05
V
I/O Input High (LVDS)
V
IH
V
ICM
+ 0.05
+1.9
V
I/O Output Low (LVDS)
V
OL
+0.832
+1.01
+1.197
V
I/O Output High (LVDS)
V
OH
+1.243
+1.377
+1.509
V
Input Leakage Current
(no pull-up or pull-down)
I
IL1
0
1
μ
A
Input Leakage Current
(with internal pull-down)
I
IL2
0 (LPDL)
200 (MPUL)
μ
A
1
Input Leakage Current
(with internal pull-up)
I
IL3
150 (LPDL)
0 (MPUL)
μ
A
1
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