參數(shù)資料
型號: PM5352-B1
英文描述: Interface IC
中文描述: 接口IC
文件頁數(shù): 57/77頁
文件大?。?/td> 901K
代理商: PM5352-B1
PM5352 S/UNI STAR
DATA SHEET
PMC-1990421
ISSUE 2
SATURN USER NETWORK INTERFACE 155 (STAR)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
53
Register 0x01: S/UNI-STAR Master Configuration
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Function
PECLV
Reserved
Reserved
Reserved
TXC_OE
Reserved
Reserved
Reserved
Default
0
0
0
0
0
0
1
1
TXC_OE:
The differential line rate clock output enable (TXC_OE). TXC_OE
enables the TXC+/- outputs. When TXC_OE is set to logic zero TXC+/-
is not active (high impedance). When TXC_OE is set to logic one,
TXC+/- provides a line rate clock output.
PECLV:
The PECL receiver input voltage (PECLV) bit configures the PECL
receiver level shifter. When PECLV is set to logic zero, the PECL
receivers are configured to operate with a 3.3V input voltage. When
PECLV is set to logic one, the PECL receivers are configured to
operate with a 5.0V input voltage.
Reserved:
The reserved bits must be programmed to their default value proper
operation.
This Material Copyrighted by Its Respective Manufacturer
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