參數(shù)資料
型號： PLX9656
英文描述： I/O Accelerator|PCI9656 Data Book Corrections
中文描述： I / O加速器| PCI9656數(shù)據(jù)手冊更正
文件頁數(shù)： 5/28頁
文件大小： 162K
代理商： PLX9656
12/19/2002
- 5 -
9656-SIL-DC1-P0-.96
Table 2. Electrical Characteristics Over Operating Range
Description
Test Conditions
Output
High Voltage
Output
Low Voltage
Output
High Voltage
Output
Low Voltage
Input
High Level
Input
Low Level
PCI 3.3V
Output
High Voltage
PCI 3.3V
Output
Low Voltage
PCI 3.3V Input
High Level
PCI 3.3V Input
Low Level
Input Leakage
Current
DC Current
Per Pin During
Pre-charge
Three-State
Output
Leakage
Current
Power Supply
Current
for I/O Ring
Power Supply
Current
for Core
Quiescent
Power Supply
Current
Parameter
Min
Max
Units
V
OH
1
I
OH
= -12.0 mA
2.4
-
V
V
OL
1
V
DD
= Min
V
IN
= V
IH
or V
IL
I
OL
= 12.0 mA
-
0.4
V
V
OH
2
I
OH
= -24.0 mA
2.4
-
V
V
OL
2
V
DD
= Min
V
IN
= V
IH
or V
IL
I
OL
= 24.0 mA
-
0.4
V
V
IH
-
-
2.0
5.5
V
V
IL
-
-
-0.5
0.8
V
V
OH3
I
OH
= -500 μA
0.9 V
DD
-
V
V
OL3
V
DD
= Min
V
IN
= V
IH
or V
IL
I
OL
= 1500 μA
-
0.1 V
DD
V
V
IH3
-
-
0.5 V
DD
V
DD
+0.5
V
V
IL3
-
-
-0.5
0.3 V
DD
V
I
Il
V
SS
= V
IN
= V
DD
, V
DD
= Max
-10
+10
μA
I
LPC
3
V
P
= 0.8 to 1.2V
-
1.0
mA
I
OZ
V
DD
= Max
-10
+10
μA
I
DD
4
(I/O Ring)
I/O Ring V
DD
= 3.6V
PCLK = 66MHz, LCLK = 66MHz
-
95
mA
I
DD
(Core)
Core V
DD
= 2.63V
PCLK = 66MHz, LCLK = 66MHz
-
185
mA
I
CCL
I
CCH
I
CCZ
V
CC
= Max
V
IN
= GND or V
CC
-
50
μA
Notes:
1. For 12 mA I/O or output cells (Local Bus side).
2. For 24 mA I/O or output cells (Local Bus side).
3. I
LPC
is the DC current flowing from VDD to Ground during pre-charge, as both PMOS and
NMOS devices remain on during pre-charge. It is not the leakage current flowing into or out
of the pin under pre-charge.
4. 40 Local Bus side I/Os switching simultaneously and 76 PCI side I/Os switching
simultaneously.
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