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參數(shù)資料
| 型號： | PLX9656 |
| 英文描述： | I/O Accelerator|PCI9656 Data Book Corrections |
| 中文描述： | I / O加速器| PCI9656數(shù)據(jù)手冊更正 |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 162K |
| 代理商： | PLX9656 |
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12/19/2002
- 16 -
9656-SIL-DC1-P0-.96
Table 13. J Mode Local Bus Input AC Timing Specifications
Signals
(Synchronous Inputs)
(V
CC
= 3.0V, T
a
= 85°C)
Blue Book
4.5 ns
4.5 ns
BIGEND#
4.5 ns
BLAST#
4.5 ns
BREQi
4.5 ns
BTERM#
4.5 ns
CCS#
4.5 ns
DMPAF/
EOT#
4.5 ns
DP[3:0]
4.5 ns
DREQ[1:0]#
4.5 ns
LA [28:2]
4.5 ns
LAD[31:0]
4.5 ns
LBE[3:0]#
4.5 ns
LHOLDA
4.5 ns
LW/R#
4.5 ns
READY#
4.5 ns
USERi/LLOCKi#
4.5 ns
WAIT#
4.5 ns
Input Clocks
Local Clock Input Frequency
PCI Clock Input Frequency
T
T
(V
CC
= 3.0V, T
a
= 85°C)
Blue Book AD STA
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
Max
66 MHz
66 MHz
ADS#
ALE
AD STA
4.9 ns
4.5 ns
4.8 ns
4.0 ns
1.7 ns
4.8 ns
1.7 ns
4.7 ns
2.0 ns
4.4 ns
4.0 ns
4.9 ns
4.6 ns
4.2 ns
5.0 ns
4.7 ns
2.4 ns
4.7 ns
Min
0 MHz
0 MHz
BA STA
2.1 ns
1.7 ns
4.0 ns
3.4 ns
0.3 ns
4.2 ns
2.9 ns
4.2 ns
2.9 ns
3.3 ns
3.4 ns
3.1 ns
3.6 ns
2.5 ns
3.5 ns
4.2 ns
2.9 ns
4.0 ns
BA STA
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
1 ns
Table 14. J Mode Local Bus Output AC Timing Specifications
Signals
(Synchronous Outputs)
Blue Book
ADS#
9 ns
ALE
9 ns
BLAST#
9 ns
BREQo
9 ns
BTERM#
9 ns
DACK[1:0]#
9 ns
DEN#
9 ns
DMPAF
/EOT#
9 ns
DP[3:0]
9 ns
DT/R#
9 ns
LA[28:2]
9 ns
LAD[31:0]
9 ns
LBE[3:0]#
9 ns
LHOLD
9 ns
LSERR#
9 ns
LW/R#
9 ns
READY#
9 ns
USERo/LLOCKo#
9 ns
WAIT#
9 ns
Output T
(C
L
= 50pF, V
CC
= 3.0V, T
a
= 85°C)
AD
1
STA
7.6 ns
8.0 ns
7.6 ns
9.5 ns
8.3 ns
7.6 ns
7.9 ns
8.5 ns
7.9 ns
7.9 ns
8.0 ns
7.8 ns
7.6 ns
7.5 ns
10.2 ns
7.6 ns
9.0 ns
7.6 ns
7.6 ns
BA
2
STA
6.3 ns
See item 9, above.
6.3 ns
6.8 ns
6.8 ns
6.3 ns
6.4 ns
6.6 ns
6.8 ns
6.3 ns
6.4 ns
6.4 ns
6.3 ns
6.8 ns
7.5 ns
6.3 ns
7.2 ns
6.3 ns
6.4 ns
1
On high-to-low transitions, output T
VALID
values increase/decrease by 23 ps for each increase/decrease of 1pF.
On low-to-high transitions, output T
VALID
values increase/decrease by 20 ps for each increase/decrease of 1pF.
2
On high-to-low transitions, output T
VALID
values increase/decrease by 16 ps for each increase/decrease of 1pF.
On low-to-high transitions, output T
VALID
values increase/decrease by 20 ps for each increase/decrease of 1pF.
On high-to-low transitions, the slew rate at 50 pF loading is 1.93 V/ns typical; .94 V/ns worst case.
On low-to-high transitions, the slew rate at 50 pF loading is 1.15 V/ns typical; .70 V/ns worst case.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PL-XLD-00-SH0-C5 | 制造商:JDSU 制造商全稱:JDS Uniphase Corporation 功能描述:850 nm 8.5 G TOSA |
| PLXPCI6140 | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PL-XPL-00-S23-28 | 制造商:PICO_ELEC 功能描述: |
| PLXWV | 制造商:Thomas & Betts 功能描述:Metallic Steel Wall Mount Steel City Metallic Box |
| PL-XXD-00-S40-CX | 制造商:JDSU 制造商全稱:JDS Uniphase Corporation 功能描述:850 nm 10 G TOSA |
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