參數(shù)資料
型號: PIP201-12M
廠商: NXP SEMICONDUCTORS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC68
封裝: 10 X 10 X 0.85 MM, PLASTIC, HVQFN-68
文件頁數(shù): 3/20頁
文件大?。?/td> 333K
代理商: PIP201-12M
Philips Semiconductors
PIP201-12M
DC to DC converter powertrain
Product data
Rev. 02 — 18 July 2002
11 of 21
9397 750 09833
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
To protect the control circuit from the transient voltages, the following precautions
must be taken. Refer to Figure 12.
1. The output stage ground (VSSO) must be connected to the decoupling capacitor
(Cin) before joining the ground plane. Otherwise, the switching noise on VSSO will
couple into the control circuit ground (VSSC).
2. The control circuit supply must be ltered using a resistor-capacitor (RC) lter.
The values shown in Figure 12 are suitable for most applications.
3. It is essential that the VSSC (signal ground) connection at the device is not
connected in the current return path between the VSSO (power ground)
connection at the device and the VDDO input capacitor.
4. It is also essential that the input to the VDDC (logic power) lter is not connected in
the current path between the VDDO (conversion power) connection at the device.
11.4 Switching frequency
A high operating frequency reduces the size and number of capacitors needed to
lter the output current, and also reduces the size of the output inductors. The
disadvantage is higher dissipation due to switching and MOSFET driver losses. For
example, doubling the operating frequency of the circuit in Figure 11 from 500 kHz to
1 MHz would increase the power dissipation in each PIP201-12M from 2.7 W to
4.5 W, at an output current of 12.5 A in each PIP201-12M.
The maximum switching frequency is limited by thermal considerations, the
dissipation in the PIP201-12M device(s) and the thermal resistance from junction to
ambient.
11.5 Thermal design
The PIP201-12M has three pads on its underside. These are designated PAD1, PAD2
and PAD3 (Figure 2). PAD1 is connected to VDDO, PAD2 is connected to VSSC and
PAD3 is connected to VO. In addition to providing low inductance electrical
connections, these pads conduct heat away efciently from the MOSFETs and
control IC to the printed-circuit board. The thermal resistance from junction to
Fig 12. External connection of power and signal lines.
VI
VDDC
VSSC
VO
VDDO
control circuit
supply (12 V)
output stage supply voltage
VSSO
CB
03ae27
output
100
nF
Lout
Cout
10
1
F
Cin
signal ground
power ground
input voltage
from PWM controller
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