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3.5.3
Standardized Zoomed-Video Register Model
The standardized zoomed-video register model is defined for the purpose of standardizing the ZV port control for PC
Card controllers across the industry. The following list summarizes the standardized zoomed-video register model
changes to the existing PC Card register set.
Socket present state register (CardBus socket address + 08h, see Section 6.3)
Bit 27 (ZVSUPPORT) has been added. The platform BIOS can set this bit via the socket force event register
(CardBus socket address + 0Ch, see Section 6.4) to define whether zoomed video is supported on that
socket by the platform.
Socket force event register (CardBus socket address + 0Ch, see Section 6.4)
Bit 27 (FZVSUPPORT) has been added. The platform BIOS can use this bit to set bit 27 (ZVSUPPORT)
in the socket present state register (CardBus socket address + 08h, see Section 6.3) to define whether
zoomed video is supported on that socket by the platform.
Socket control register (CardBus socket address +10h, see Section 6.5)
Bit 11 (ZV_ACTIVITY) has been added. This bit is set when zoomed video is enabled for either of the PC
Card sockets.
Bit 10 (STANDARDZVREG) has been added. This bit defines whether the PC Card controller supports the
standardized zoomed-video register model.
Bit 9 (ZVEN) is provided for software to enable or disable zoomed video, per socket.
If the ZV_EN bit (bit 0) in the diagnostic register (PCI offset 93h, see Section 4.38) is 1, then the standardized zoomed
video register model is disabled. For backward compatibility, even if the ZV_EN bit is 0 (enabled), the PCI4510 device
allows software to access zoomed video through the legacy address in the card control register (PCI offset 91h, see
Section 4.36), or through the new register model in the socket control register (CardBus socket address + 10h, see
Section 6.5).
3.5.4
Internal Ring Oscillator
The internal ring oscillator provides an internal clock source for the PCI4510 device so that neither the PCI clock nor
an external clock is required in order for the PCI4510 device to power down a socket or interrogate a PC Card. This
internal oscillator, operating nominally at 16 kHz, is always enabled.
3.5.5
Integrated Pullup Resistors for PC Card Interface
The
PC Card Standard
(release 8.0) requires pullup resistors on various terminals to support both CardBus and 16-bit
card configurations. Unlike the PCI12XX, PCI1450, and PCI4450 devices which required external pullup resistors,
the PCI4510 device has integrated all of these pullup resistors. The I/O buffer on the BVD1(STSCHG/RI)//CSTSCHG
terminal has the capability to switch either pullup or pulldown resistor. The pullup resistor is turned on when a 16-bit
PC Card is inserted, and the pulldown resistor is turned on when a CardBus PC Card is inserted. This prevents
unexpected CSTSCHG signal assertion. The integrated pullup resistors are listed in Table 33.