參數(shù)資料
型號： PCF50732
廠商： NXP Semiconductors N.V.
英文描述： Baseband and audio interface for GSM
中文描述： 用于GSM基帶和音頻接口
文件頁數(shù)： 52/64頁
文件大?。?/td> 322K
代理商： PCF50732
1999 May 03
52
Philips Semiconductors
Objective specification
Baseband and audio interface for GSM
PCF50732
18.5
V
DDA
= 2.5 to 2.75 V; T
amb
=
40 to +85
°
C.
Auxiliary digital-to-analog converters
Notes
1.
2.
INL: the difference of the output to the best fit line. INL
(i)
= [V
(i)
(a + i
×
b)]/1 LSB; INL = (INL
(i)(max)
INL
(i)(min)
)/2.
DNL is the difference between individual code width and average code width (1 LSB); maximum and minimum
specified. DNL
(i)
= [(V
(i + 1)
V
(i)
1 LSB)/1 LSB]; DNL
(min)
>
1 is equivalent to monotonicity V
(i + 1)
> V
(i)
.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
AUXDAC1
RES
DAC1
VOMIN
DAC1
VOMAX
DAC1
VDEF
DAC1
MON
DAC1
INL
DAC1
DNL
DAC1
OFFS
DAC1
FSST
DAC1
LSBST
DAC1
resolution
minimum output voltage
maximum output voltage
output voltage after reset
monotonicity range
integral non-linearity
(1)
differential non-linearity
(2)
offset error
full-scale settling time
one LSB settling time
0
2.1
5.0
1.0
80
8
2.2
1.147
8
40
8
0.15
2.3
+5.0
+1.0
+80
bit
V
V
V
bit
LSB
LSB
mV
μ
s
μ
s
register value: 000H
register value: 0FFH
register value: 085H
load: 50 pF // 2 k
,
to V
SS
;
see Fig.13a
AUXDAC2
RES
DAC2
VOMIN
DAC2
VOMAX
DAC2
VDEF
DAC2
MON
DAC2
INL
DAC2
DNL
DAC2
OFFS
DAC2
FSST
DAC2
LSBST
DAC2
POST
DAC2
resolution
minimum output voltage
maximum output voltage
output voltage after reset
monotonicity range
integral non-linearity
(1)
differential non-linearity
(2)
offset error
full-scale settling time
one LSB settling time
power-on settling time
0
2.1
1.0
25
12
2.2
1.1
12
±
10
40
8
0.15
2.32
+2.0
+25
4
bit
V
V
V
bit
LSB
LSB
mV
μ
s
μ
s
ms
register value: 000H
register value: FFFH
register value: 800H
load: 50 pF // 10 k
,
to
V
SS
; see Fig.13b
see Section 18.1
AUXDAC3
RES
DAC3
VOMIN
DAC3
VOMAX
DAC3
MON
DAC3
INL
DAC3
DNL
DAC3
OFFS
DAC3
FSST
DAC3
LSBST
DAC3
SSC
DAC3
resolution
minimum output voltage
maximum output voltage
monotonicity range
integral non-linearity
(1)
differential non-linearity
(2)
offset error
full-scale settling time
one LSB settling time
output source/sink current
0
2.1
5.0
1.0
40
1
10
2.2
10
10
2.5
0.15
2.3
+5.0
+1.0
+40
15
2.5
bit
V
V
bit
LSB
LSB
mV
μ
s
μ
s
mA
register value: 000H
register value: 3FFH
load: 50 pF // 1 k
,
to V
SS
;
see Fig.13c
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