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參數(shù)資料
| 型號： | PCA9541 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 2-to-1 I2C master selector with interrupt logic and reset |
| 中文描述： | 2比1的I2C主機選擇與中斷邏輯和復位 |
| 文件頁數(shù)： | 7/30頁 |
| 文件大小： | 279K |
| 代理商： | PCA9541 |
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Philips Semiconductors
Product data sheet
PCA9541
2-to-1 I
2
C master selector with interrupt logic and reset
2004 Oct 01
7
Register 0: Interrupt Enable (IE) Register (B1B0 = 00)
This register allows a master to read and/or write (if needed) Mask options for its own channel.
The Interrupt Enable Register described below is identical for both the masters. Nevertheless, there are physically 2 internal Interrupt Enable
Registers, one for each upstream channel.
When Master 0 reads/writes in this register, the internal Interrupt Enable Register 0 will be accessed.
When Master 1 reads/writes in this register, the internal Interrupt Enable Register 1 will be accessed.
BIT
7
6
5
4
3
2
1
0
SYMBOL
0
0
0
0
BUSLOSTMSK
BUSOKMSK
BUSINITMSK
INTINMSK
Table 2.
Register 0
BIT
SYMBOL
READ/
WRITE
DEFAULT
DESCRIPTION
0
INTINMSK
R/W
0
0: Interrupt on INT_IN will generate an interrupt on INT
1: Interrupt on INT_IN will not generate an interrupt on INT (masked)
1
BUSINITMSK
R/W
0
0: After connection is requested and Bus Initialization requested (BUSINIT = 1), an
interrupt on INT will be generated when the bus initialization is done.
Note: Channel switching is done after bus initialization completed.
1: After connection is requested and Bus Initialization requested (BUSINIT = 1), an
interrupt on INT will not be generated when the bus initialization is done (masked).
Note: Channel switching is done after bus initialization completed.
2
BUSOKMSK
R/W
0
0: After connection is requested and Bus Initialization not requested (BUSINIT = 0), an
interrupt on INT will be generated when a non-Idle situation has been detected on the
downstream slave channel by the bus sensor at the switching moment.
Note: Channel switching is done automatically after the STOP command.
1: After connection is requested and Bus Initialization not requested (BUSINIT = 0), an
interrupt on INT will not be generated when a non-Idle situation has been detected on
the downstream slave channel by the bus sensor at the switching moment (masked).
Note: Channel switching is done automatically after the STOP command.
3
BUSLOSTMSK
R/W
0
0: An interrupt on INT will be generated after the other master has been been
disconnected
1: An interrupt on INT will not be generated after the other master has been been
disconnected.
4
NOT USED
R only
0
5
NOT USED
R only
0
6
NOT USED
R only
0
7
NOT USED
R only
0
NOTE:
Default values are the same for PCA9541/01, PCA9541/02, and PCA9541/03
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9541_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-to-1 I2C-bus master selector with interrupt logic and reset |
| PCA9541_09 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-to-1 I2C-bus master selector with interrupt logic and reset |
| PCA9541A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-to-1 I2C-bus master selector with interrupt logic and reset |
| PCA9541ABS/01 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-to-1 I2C-bus master selector with interrupt logic and reset |
| PCA9541ABS/01,118 | 功能描述:I2C 接口集成電路 2-to-1 I2C-bus master selector RoHS:否 制造商:NXP Semiconductors 電源電壓-最大:5.5 V 電源電壓-最小:2.3 V 最大工作頻率:400 KHz 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-16 |
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