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參數(shù)資料
| 型號： | PC34704BEP |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 電源管理 |
| 英文描述： | 8-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC56 |
| 封裝： | 7 X 7 MM, 1 MM HEIGHT, 0.40 MM PITCH, ROHS COMPLIANT, QFN-56 |
| 文件頁數(shù)： | 18/50頁 |
| 文件大?。?/td> | 2010K |
| 代理商： | PC34704BEP |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
25
34704
FUNCTIONAL DESCRIPTION
FUNCTIONAL INTERNAL BLOCK DESCRIPTION
Output voltage is adjustable by means of an external
resistor divider when in voltage regulation mode
A 240mV current limit comparator will be used to program/
sense the voltage drop across the current setting resistor
at the bottom of the LED string connected
to the REG8
output when the current regulation mode is selected.
This will be used to program the maximum current flowing
and will regulate it
The output can be adjusted up or down at 2.5% steps for
a total of 10% on each direction allowing Dynamic Voltage
Scaling
Maximum output current is adjustable by means of an
external resistor connected to the FB8 pin and then the
output current can be scaled down from the set maximum
in 16 steps through I2C interface
Uses a bootstrap network with an internal diode to power
its synchronous MOSFET
All gate drive circuits are supplied from VG.
Uses integrated compensation
The output is monitored for over-current and short-circuit
conditions
The regulator is monitored for over-temperature conditions
The output is monitored for under-voltage and over-
voltage conditions
Operation Modes
The switchers will be active when:
VG is in regulation AND
There is no GrpD shutdown command through the I2C
interface AND
No faults exist that would cause GrpD to shut down
34704B overall system efficiency 89%
Overall System
Pout (W)
1.74
Ploss On Chip (W)
0.192
Ploss Total (W)
0.202
Pin (W)
1.942
n (%)
89.6%
34704A overall system efficiency 84%
Overall System
Pout (W)
3.340
Ploss On Chip (W)
0.369
Ploss Total (W)
0.41
Pin (W)
3.75
n (%)
84.00%
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